Kevin M. Lepak

According to our database1, Kevin M. Lepak authored at least 12 papers between 2000 and 2005.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2005
Temperature and supply Voltage aware performance and power modeling at microarchitecture level.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005

Reaping the Benefit of Temporal Silence to Improve Communication Performance.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2005

2004
Simultaneous shield insertion and net ordering for capacitive and inductive coupling minimization.
ACM Trans. Design Autom. Electr. Syst., 2004

2003
Redeeming IPC as a Performance Metric for Multithreaded Programs.
Proceedings of the 12th International Conference on Parallel Architectures and Compilation Techniques (PACT 2003), 27 September, 2003

2002
Temporally silent stores.
Proceedings of the 10th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-X), 2002

2001
Silent Stores and Store Value Locality.
IEEE Trans. Computers, 2001

A dynamic binary translation approach to architectural simulation.
SIGARCH Comput. Archit. News, 2001

Simultaneous Shield Insertion and Net Ordering under Explicit RLC Noise Constraint.
Proceedings of the 38th Design Automation Conference, 2001

2000
Silent stores for free.
Proceedings of the 33rd Annual IEEE/ACM International Symposium on Microarchitecture, 2000

Simultaneous shield insertion and net ordering for capacitive and inductive coupling minimization.
Proceedings of the 2000 International Symposium on Physical Design, 2000

On the value locality of store instructions.
Proceedings of the 27th International Symposium on Computer Architecture (ISCA 2000), 2000

Characterization of Silent Stores.
Proceedings of the 2000 International Conference on Parallel Architectures and Compilation Techniques (PACT'00), 2000


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