Khanh N. Dang

Orcid: 0000-0001-6702-3870

Affiliations:
  • University of Aizu, Adaptive Systems Laboratory, Aizuwakamatsu, Japan
  • Vietnam National University, VNU University of Engineering and Technology, SISLAB, Hanoi, Vietnam


According to our database1, Khanh N. Dang authored at least 36 papers between 2014 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
Power-Aware Neuromorphic Architecture With Partial Voltage Scaling 3-D Stacking Synaptic Memory.
IEEE Trans. Very Large Scale Integr. Syst., December, 2023

Fault-Tolerant Spiking Neural Network Mapping Algorithm and Architecture to 3D-NoC-Based Neuromorphic Systems.
IEEE Access, 2023

R-MaS3N: Robust Mapping of Spiking Neural Networks to 3D-NoC-Based Neuromorphic Systems for Enhanced Reliability.
IEEE Access, 2023

An In-Situ Dynamic Quantization With 3D Stacking Synaptic Memory for Power-Aware Neuromorphic Architecture.
IEEE Access, 2023

HeterGenMap: An Evolutionary Mapping Framework for Heterogeneous NoC-Based Neuromorphic Systems.
IEEE Access, 2023

Interlinked Chain Method for Blockchain-Based Collaborative Learning in Vehicular Networks.
Proceedings of the 16th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2023

A Novel Yield Improvement Approach for 3D Stacking Neuromorphic Architecture.
Proceedings of the 16th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2023

Fault Recovery in Spiking Neural Networks Through Target and Selection of Faulty Neurons for 3D Spiking Neuromorphic Processors.
Proceedings of the 6th IEEE International Conference on Knowledge Innovation and Invention, 2023

2022
A low-power, high-accuracy with fully on-chip ternary weight hardware architecture for Deep Spiking Neural Networks.
Microprocess. Microsystems, April, 2022

MigSpike: A Migration Based Algorithms and Architecture for Scalable Robust Neuromorphic Systems.
IEEE Trans. Emerg. Top. Comput., 2022

HotCluster: A Thermal-Aware Defect Recovery Method for Through-Silicon-Vias Toward Reliable 3-D ICs Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Efficient Pneumonia Detection Method and Implementation in Chest X-ray Images Based on a Neuromorphic Spiking Neural Network.
Proceedings of the Computational Collective Intelligence - 14th International Conference, 2022

Neuromorphic Computing Principles and Organization
Springer, ISBN: 978-3-030-92524-6, 2022

2021
On the Design of a Fault-Tolerant Scalable Three Dimensional NoC-Based Digital Neuromorphic System With On-Chip Learning.
IEEE Access, 2021

Energy-Efficient Spike-Based Scalable Architecture for Next-Generation Cognitive AI Computing Systems.
Proceedings of the Ubiquitous Networking - 7th International Symposium, 2021

2020
TSV-OCT: A Scalable Online Multiple-TSV Defects Localization for Real-Time 3-D-IC Systems.
IEEE Trans. Very Large Scale Integr. Syst., 2020

Scalable Design Methodology and Online Algorithm for TSV-Cluster Defects Recovery in Highly Reliable 3D-NoC Systems.
IEEE Trans. Emerg. Top. Comput., 2020

Soft-Error and Hard-fault Tolerant Architecture and Routing Algorithm for Reliable 3D-NoC Systems.
CoRR, 2020

Report on power, thermal and reliability prediction for 3D Networks-on-Chip.
CoRR, 2020

A Non-Blocking Non-Degrading Multiple Defects Link Testing Method for 3D-Networks-on-Chip.
IEEE Access, 2020

A Thermal-Aware On-Line Fault Tolerance Method for TSV Lifetime Reliability in 3D-NoC Systems.
IEEE Access, 2020

Light-Weight Spiking Neuron Processing Core for Large-Scale 3D-NoC Based Spiking Neural Network Processing Systems.
Proceedings of the 2020 IEEE International Conference on Big Data and Smart Computing, 2020

A lightweight Max-Pooling method and architecture for Deep Spiking Convolutional Neural Networks.
Proceedings of the 2020 IEEE Asia Pacific Conference on Circuits and Systems, 2020

2019
An on-Communication Multiple-TSV Defects Detection and Localization for Real-Time 3D-ICs.
Proceedings of the 13th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2019

TSV-IaS: Analytic Analysis and Low-Cost Non-Preemptive on-Line Detection and Correction Method for TSV Defects.
Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI, 2019

An Efficient Software-Hardware Design Framework for Spiking Neural Network Systems.
Proceedings of the International Conference on Internet of Things, 2019

2D-PPC: A single-correction multiple-detection method for Through-Silicon-Via Faults.
Proceedings of the 2019 IEEE Asia Pacific Conference on Circuits and Systems, 2019

2018
Parity-Based ECC and Mechanism for Detecting and Correcting Soft Errors in On-Chip Communication.
Proceedings of the 12th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2018

2017
A Comprehensive Reliability Assessment of Fault-Resilient Network-on-Chip Using Analytical Model.
IEEE Trans. Very Large Scale Integr. Syst., 2017

A low-overhead soft-hard fault-tolerant architecture, design and management scheme for reliable high-performance many-core 3D-NoC systems.
J. Supercomput., 2017

Real-Time UAV Attitude Heading Reference System Using Extended Kalman Filter for Programmable SoC.
Proceedings of the 11th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2017

2016
Soft-error resilient Network-on-Chip for safety-critical applications.
Proceedings of the International Conference on IC Design and Technology, 2016

Reliability Assessment and Quantitative Evaluation of Soft-Error Resilient 3D Network-on-Chip Systems.
Proceedings of the 25th IEEE Asian Test Symposium, 2016

2015
Soft-error resilient 3D Network-on-Chip router.
Proceedings of the IEEE 7th International Conference on Awareness Science and Technology, 2015

2014
An efficient hardware architecture for inter-prediction in H.264/AVC encoders.
Proceedings of the 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2014

H.264/AVC hardware encoders and low-power features.
Proceedings of the 2014 IEEE Asia Pacific Conference on Circuits and Systems, 2014


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