Kiichi Yamashita

According to our database, Kiichi Yamashita authored at least 14 papers between 1976 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

A Complementary Split Ring Resonator Sensor Optimized for Maximizing the Dip and Q-value in S21 Frequency Characteristics.

Koji Yoshimura, Yasuhiro Sugimoto, Uta Kobayashi, Kiichi Yamashita, Akira Yasuda

Proceedings of the IEEE International Conference on Consumer Electronics, 2024

A CSRR Glucose Concentration Sensor with Increased Resolution Using the Q-value Enhancement Circuit Technique.

Uta Kobayashi, Yasuhiro Sugimoto, Koji Yoshimura, Kiichi Yamashita, Akira Yasuda

Proceedings of the IEEE International Conference on Consumer Electronics, 2024

2023

Rewiring Effect of High Synchronization Edges in Complex Oscillator Networks.

Haruka Sakohira, Kiichi Yamashita, Yoko Uwate, Yoshifumi Nishio

Proceedings of the 20th International SoC Design Conference, 2023

Synchoronization Penomena of Coupled Oscillators in Weighted Three-Dimensional Complex Networks.

Daiki Akai, Kiichi Yamashita, Yoko Uwate, Yoshifumi Nishio

Proceedings of the 20th International SoC Design Conference, 2023

2022

Synchronization Phenomena of Coupled Oscillators with Node and Edge Weights in Two-Dimensional Complex Networks.

Kiichi Yamashita, Yoko Uwate, Yoshifumi Nishio

Proceedings of the 19th International SoC Design Conference, 2022

2010

17 Gb/s VCSEL driver using double-pulse asymmetric emphasis technique in 90-nm CMOS for optical interconnection.

Kenichi Ohhata, Hironori Imamura, Toshinobu Ohno, Takaya Taniguchi, Kiichi Yamashita, Toru Yazaki, Norio Chujo

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2009

Design of a 770-MHz, 70-mW, 8-bit Subranging ADC Using Reference Voltage Precharging Architecture.

Kenichi Ohhata, Koki Uchino, Yuichiro Shimizu, Kosuke Oyama, Kiichi Yamashita

IEEE J. Solid State Circuits, 2009

2008

Sandwich Structure Type RF-MEMS Variable Capacitor with Low Voltage Controllability and Wide Tuning Range.

Takuma Nishimoto, Kiichi Yamashita, Kenichi Ohhata

IEICE Trans. Commun., 2008

Feedthrough reduction technique for track-and-hold circuit with body-bias control circuit.

Kenichi Ohhata, Yuichiro Shimizu, Kiichi Yamashita

IEICE Electron. Express, 2008

2007

A 1-GHz, 56.3-dB SFDR CMOS track-and-hold circuit with body-bias control circuit.

Kenichi Ohhata, Kosuke Yayama, Yuichiro Shimizu, Kiichi Yamashita

IEICE Electron. Express, 2007

2006

Design of Low-Noise, Low-Power 10-GHz VCO Using 0.18-µm CMOS Technology.

Kenichi Ohhata, Katsuyoshi Harasawa, Makoto Honda, Kiichi Yamashita

IEICE Trans. Electron., 2006

1995

Constant-current circuit-biasing technology for GaAs FET IC.

Nobuo Kotera, Kiichi Yamashita, Keiichi Kitamura, Yasushi Hatta

IEEE J. Solid State Circuits, January, 1995

1984

Instantaneous In-Service Fault Location Scheme For Digital Transmission Systems.

Yoshitaka Takasaki, Kiichi Yamashita, Yasushi Takahashi, Yuji Nakano

Proceedings of the IEEE International Conference on Communications: Links for the Future, 1984

1976

Optical Pulse Formats for Fiber Optic Digital Communications.

Yoshitaka Takasaki, Mitsuo Tanaka, Narimichi Maeda, Kiichi Yamashita, Katsuyuki Nagano

IEEE Trans. Commun., 1976