Koki Uchino

According to our database, Koki Uchino authored at least 5 papers between 2009 and 2016.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2016

A 12 Gb/s 0.9 mW/Gb/s Wide-Bandwidth Injection-Type CDR in 28 nm CMOS With Reference-Free Frequency Capture.

Takashi Masuda, Ryota Shinoda, Jeremy Chatwin, Jacob Wysocki, Koki Uchino, Yoshifumi Miyajima, Yosuke Ueno, Kenichi Maruko, Zhiwei Zhou, Hideyuki Suzuki, Norio Shoji

IEEE J. Solid State Circuits, 2016

10.4 A 12Gb/s 0.9mW/Gb/s wide-bandwidth injection-type CDR in 28nm CMOS with reference-free frequency capture.

Takashi Masuda, Ryota Shinoda, Jeremy Chatwin, Jacob Wysocki, Koki Uchino, Yoshifumi Miyajima, Yosuke Ueno, Kenichi Maruko, Zhiwei Zhou, Hideyuki Matsumoto, Hideyuki Suzuki, Norio Shoji

Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

2014

8.2 A 12×5 two-dimensional optical I/O array for 600Gb/s chip-to-chip interconnect in 65nm CMOS.

Hiroshi Morita, Koki Uchino, Eiji Otani, Hiizu Ohtorii, Takeshi Ogura, Kazunao Oniki, Shuichi Oka, Shusaku Yanagawa, Hideyuki Suzuki

Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

2012

A 1V 357Mb/s-throughput transferjet™ SoC with embedded transceiver and digital baseband in 90nm CMOS.

Masahisa Tamura, Fumitaka Kondo, Katsumi Watanabe, Yasunori Aoki, Yusuke Shinohe, Koki Uchino, Yuhei Hashimoto, Fumihiro Nishiyama, Hiroaki Miyachi, Ikuho Nagase, Itaru Uezono, Rie Hisamura, Itaru Maekawa

Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

2009

Design of a 770-MHz, 70-mW, 8-bit Subranging ADC Using Reference Voltage Precharging Architecture.

Kenichi Ohhata, Koki Uchino, Yuichiro Shimizu, Kosuke Oyama, Kiichi Yamashita

IEEE J. Solid State Circuits, 2009