Kishan Joshi

According to our database, Kishan Joshi authored at least 3 papers between 2017 and 2025.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of five.

2025

21.5 A Fully Integrated Multi-Phase Voltage Regulator with Enhanced Light-Load-Efficiency Peak of 86%, Featuring an Autonomous Mode Transition from Hard-Switching to Soft-Switching to Discontinuous Conduction Mode in 3nm FinFET CMOS.

Kishan Joshi, Avinash Shreepathi Bhat, Christopher Schaef, Keng Chen, Edward Lee, Yura Kocharyan, Ajay Janardanan, Dinesh Ganta, Huanhuan Zhang, Maximilian Geppert, Prescott McLaughlin, Arvind Raghavan, Sivaraman Masilamani, Syed Askari, Kelly Livingston

Proceedings of the IEEE International Solid-State Circuits Conference, 2025

2020

A 5.6 μ A Wide Bandwidth, High Power Supply Rejection Linear Low-Dropout Regulator With 68 dB of PSR Up To 2 MHz.

Kishan Joshi, Sanjeev Manandhar, Bertan Bakkaloglu

IEEE J. Solid State Circuits, 2020

2017

A 6 A, 93% Peak Efficiency, 4-Phase Digitally Synchronized Hysteretic Buck Converter With ±1.5% Frequency and ±3.6% Current-Sharing Error.

Ming Sun, Zhe Yang, Kishan Joshi, Debashis Mandal, Philippe Adell, Bertan Bakkaloglu

IEEE J. Solid State Circuits, 2017