Kostas Bousias

According to our database1, Kostas Bousias authored at least 4 papers between 2005 and 2009.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2009
Implementation and evaluation of a microthread architecture.
J. Syst. Archit., 2009

2008
A general model of concurrency and its implementation as many-core dynamic RISC processors.
Proceedings of the 2008 International Conference on Embedded Computer Systems: Architectures, 2008

2006
Instruction Level Parallelism through Microthreading - A Scalable Approach to Chip Multiprocessors.
Comput. J., 2006

2005
The Challenges of Massive On-Chip Concurrency.
Proceedings of the Advances in Computer Systems Architecture, 10th Asia-Pacific Conference, 2005


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