Liang Guang

According to our database1, Liang Guang authored at least 27 papers between 2008 and 2014.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.



In proceedings 
PhD thesis 




From self-aware building blocks to self-organizing systems with hierarchical agent-based adaptation.
Proceedings of the 2014 International Conference on Hardware/Software Codesign and System Synthesis, 2014

Positioning Antifragility for Clouds on Public Infrastructures.
Proceedings of the 5th International Conference on Ambient Systems, 2014

Introduction to the Special Issue.
Scalable Computing: Practice and Experience, 2013

Mapping multiple applications with unbounded and bounded number of cores on many-core networks-on-chip.
Microprocess. Microsystems, 2013

Energy-aware fault-tolerant network-on-chips for addressing multiple traffic classes.
Microprocess. Microsystems, 2013

Hierarchical Supporting Structure for Dynamic Organization in Many-core Computing Systems.
Proceedings of the PECCS 2013, 2013

Incubator Platform for Multidisciplinary Innovation in Research and Education.
Int. J. Knowl. Soc. Res., 2012

Survey of Self-Adaptive NoCs with Energy-Efficiency and Dependability.

Dual Monitoring Communication for Self-Aware Network-on-Chip: Architecture and Case Study.
IJARAS, 2012

PARALIND-based Blind Joint Angle and Delay Estimation for Multipath Signals with Uniform Linear Array.
EURASIP J. Adv. Signal Process., 2012

Self-adaptive Noc Power Management with Dual-level Agents - Architecture and Implementation.
Proceedings of the PECCS 2012, 2012

Parameter-Optimized Simulated Annealing for Application Mapping on Networks-on-Chip.
Proceedings of the Learning and Intelligent Optimization - 6th International Conference, 2012

Coarse and fine-grained monitoring and reconfiguration for energy-efficient NoCs.
Proceedings of the 2012 International Symposium on System on Chip, 2012

Vertical and horizontal integration towards collective adaptive system: a visionary approach.
Proceedings of the 2012 ACM Conference on Ubiquitous Computing, 2012

t(k)-SA: accelerated simulated annealing algorithm for application mapping on networks-on-chip.
Proceedings of the Genetic and Evolutionary Computation Conference, 2012

HLS-DoNoC: High-level simulator for dynamically organizational NoCs.
Proceedings of the IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2012

Hierarchical Agent Monitoring Design Platform - Towards Self-aware and Adaptive Embedded Systems.
Proceedings of the PECCS 2011, 2011

PVS-NoC: Partial Virtual Channel Sharing NoC Architecture.
Proceedings of the 19th International Euromicro Conference on Parallel, 2011

Hierarchical agent monitoring design approach towards self-aware parallel systems-on-chip.
ACM Trans. Embedded Comput. Syst., 2010

Interconnection alternatives for hierarchical monitoring communication in parallel SoCs.
Microprocess. Microsystems, 2010

Hierarchical Agent Monitored Parallel On-Chip System: A Novel Design Paradigm and its Formal Specification.

Run-time communication bypassing for energy-efficient, low-latency per-core DVFS on Network-on-Chip.
Proceedings of the Annual IEEE International SoC Conference, SoCC 2010, 2010

Implementation and evaluation of a microthread architecture.
J. Syst. Archit., 2009

System-level exploration of run-time clusterization for energy-efficient on-chip communication.
Proceedings of the Second International Workshop on Network on Chip Architectures, 2009

Architectural Exploration of Per-Core DVFS for Energy-Constrained On-Chip Networks.
Proceedings of the 12th Euromicro Conference on Digital System Design, 2009

Autonomous DVFS on Supply Islands for Energy-Constrained NoC Communication.
Proceedings of the Architecture of Computing Systems, 2009

A general model of concurrency and its implementation as many-core dynamic RISC processors.
Proceedings of the 2008 International Conference on Embedded Computer Systems: Architectures, 2008