Koustav Bhattacharya

According to our database, Koustav Bhattacharya authored at least 15 papers between 2004 and 2011.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2011

Placement for Immunity of Transient Faults in Cell-Based Design of Nanometer Circuits.

Koustav Bhattacharya, N. Ranganathan

IEEE Trans. Very Large Scale Integr. Syst., 2011

Redundancy Mining for Soft Error Detection in Multicore Processors.

Ransford Hyman Jr., Koustav Bhattacharya, Nagarajan Ranganathan

IEEE Trans. Computers, 2011

2010

A VLSI Architecture and Algorithm for Lucas-Kanade-Based Optical Flow Computation.

Venkataraman Mahalingam, Koustav Bhattacharya, N. Ranganathan, Hari Chakravarthula, Robin R. Murphy, Kevin S. Pratt

IEEE Trans. Very Large Scale Integr. Syst., 2010

2009

A Framework for Correction of Multi-Bit Soft Errors in L2 Caches Based on Redundancy.

Koustav Bhattacharya, Nagarajan Ranganathan, Soontae Kim

IEEE Trans. Very Large Scale Integr. Syst., 2009

RADJAM: A Novel Approach for Reduction of Soft Errors in Logic Circuits.

Koustav Bhattacharya, Nagarajan Ranganathan

Proceedings of the VLSI Design 2009: Improving Productivity through Higher Abstraction, 2009

A New Placement Algorithm for Reduction of Soft Errors in Macrocell Based Design of Nanometer Circuits.

Koustav Bhattacharya, Nagarajan Ranganathan

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2009

A unified gate sizing formulation for optimizing soft error rate, cross-talk noise and power under process variations.

Koustav Bhattacharya, Nagarajan Ranganathan

Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009

A Strategy for Soft Error Reduction in Multi Core Designs.

Ransford Hyman Jr., Koustav Bhattacharya, N. Ranganathan

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

A VLSI System Architecture for Optical Flow Computation.

Koustav Bhattacharya, Venkataraman Mahalingam, Nagarajan Ranganathan

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

2008

Reliability-centric gate sizing with simultaneous optimization of soft error rate, delay and power.

Koustav Bhattacharya, Nagarajan Ranganathan

Proceedings of the 2008 International Symposium on Low Power Electronics and Design, 2008

A linear programming formulation for security-aware gate sizing.

Koustav Bhattacharya, Nagarajan Ranganathan

Proceedings of the 18th ACM Great Lakes Symposium on VLSI 2008, 2008

2007

Improving the reliability of on-chip L2 cache using redundancy.

Koustav Bhattacharya, Soontae Kim, Nagarajan Ranganathan

Proceedings of the 25th International Conference on Computer Design, 2007

2006

Multiple Exemplar-Based Facial Image Retrieval Using Independent Component Analysis.

Jayanta Basak, Koustav Bhattacharya, Santanu Chaudhury

IEEE Trans. Image Process., 2006

2004

Video Summarization: A Machine Learning Based Approach.

Koustav Bhattacharya, Santanu Chaudhury, Jayanta Basak

Proceedings of the ICVGIP 2004, 2004

Multi Example Based Image Retrieval: An ICA Based Approach.

Jayanta Basak, Koustav Bhattacharya, Santanu Chaudhury

Proceedings of the ICVGIP 2004, 2004