Kristof Du Bois

Orcid: 0000-0002-7301-4484

According to our database1, Kristof Du Bois authored at least 16 papers between 2011 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

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Bibliography

2024
Accurate and Scalable Many-Node Simulation.
CoRR, 2024

2023
The Intel Programmable and Integrated Unified Memory Architecture Graph Analytics Processor.
IEEE Micro, 2023

2021
Automatic Sublining for Efficient Sparse Memory Accesses.
ACM Trans. Archit. Code Optim., 2021

RIO: ROB-Centric In-Order Modeling of Out-of-Order Processors.
IEEE Comput. Archit. Lett., 2021

2020
PIUMA: Programmable Integrated Unified Memory Architecture.
CoRR, 2020

Projecting Performance for PIUMA using Down-Scaled Simulation.
Proceedings of the 2020 IEEE High Performance Extreme Computing Conference, 2020

2018
Multi-Stage CPI Stacks.
IEEE Comput. Archit. Lett., 2018

Many-core graph workload analysis.
Proceedings of the International Conference for High Performance Computing, 2018

Extending the Performance Analysis Tool Box: Multi-stage CPI Stacks and FLOPS Stacks.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2018

Near-side prefetch throttling: adaptive prefetching for high-performance many-core processors.
Proceedings of the 27th International Conference on Parallel Architectures and Compilation Techniques, 2018

2017
Analyzing the scalability of managed language applications with speedup stacks.
Proceedings of the 2017 IEEE International Symposium on Performance Analysis of Systems and Software, 2017

2013
Per-thread cycle accounting in multicore processors.
ACM Trans. Archit. Code Optim., 2013

Bottle graphs: visualizing scalability bottlenecks in multi-threaded applications.
Proceedings of the 2013 ACM SIGPLAN International Conference on Object Oriented Programming Systems Languages & Applications, 2013

Criticality stacks: identifying critical threads in parallel programs using synchronization behavior.
Proceedings of the 40th Annual International Symposium on Computer Architecture, 2013

2012
Speedup stacks: Identifying scaling bottlenecks in multi-threaded applications.
Proceedings of the 2012 IEEE International Symposium on Performance Analysis of Systems & Software, 2012

2011
SWEEP: evaluating computer system energy efficiency using synthetic workloads.
Proceedings of the High Performance Embedded Architectures and Compilers, 2011


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