Robert Pawlowski

According to our database1, Robert Pawlowski authored at least 9 papers between 2010 and 2023.

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Bibliography

2023
The Intel Programmable and Integrated Unified Memory Architecture Graph Analytics Processor.
IEEE Micro, 2023

2020
PIUMA: Programmable Integrated Unified Memory Architecture.
CoRR, 2020

Efficient Sparse Matrix-Vector Multiplication on Intel PIUMA Architecture.
Proceedings of the 2020 IEEE High Performance Extreme Computing Conference, 2020

2014
Characterization of radiation-induced SRAM and logic soft errors from 0.33V to 1.0V in 65nm CMOS.
Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014

2012
A 530mV 10-lane SIMD processor with variation resiliency in 45nm SOI.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

Regaining throughput using completion detection for error-resilient, near-threshold logic.
Proceedings of the 49th Annual Design Automation Conference 2012, 2012

2011
Fast and Accurate Similarity Searching of Biopolymer Sequences with GPU and CUDA.
Proceedings of the Algorithms and Architectures for Parallel Processing, 2011

Design automation methodology for improving the variability of synthesized digital circuits operating in the sub/near-threshold regime.
Proceedings of the 2011 International Green Computing Conference and Workshops, 2011

2010
Synctium: a Near-Threshold Stream Processor for Energy-Constrained Parallel Applications.
IEEE Comput. Archit. Lett., 2010


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