Wim Heirman

According to our database, Wim Heirman authored at least 56 papers between 2005 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

Accurate and Scalable Many-Node Simulation.

Stijn Eyerman, Wim Heirman, Kristof Du Bois, Ibrahim Hur

CoRR, 2024

2023

The Intel Programmable and Integrated Unified Memory Architecture Graph Analytics Processor.

Sriram Aananthakrishnan, Shamsul Abedin, Vincent Cavé, Fabio Checconi, Kristof Du Bois, Stijn Eyerman, Joshua B. Fryman, Wim Heirman, Jason Howard, Ibrahim Hur, Samkit Jain, Marek M. Landowski, Kevin Ma, Jarrod A. Nelson, Robert Pawlowski, Fabrizio Petrini, Sebastian Szkoda, Sanjaya Tayal, Jesmin Jahan Tithi, Yves Vandriessche

IEEE Micro, 2023

Simulating Wrong-Path Instructions in Decoupled Functional-First Simulation.

Stijn Eyerman, Sam Van den Steen, Wim Heirman, Ibrahim Hur

Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2023

2022

Scale-Model Architectural Simulation.

Wenjie Liu, Wim Heirman, Stijn Eyerman, Shoaib Akram, Lieven Eeckhout

Proceedings of the International IEEE Symposium on Performance Analysis of Systems and Software, 2022

DRAM Bandwidth and Latency Stacks: Visualizing DRAM Bottlenecks.

Stijn Eyerman, Wim Heirman, Ibrahim Hur

Proceedings of the International IEEE Symposium on Performance Analysis of Systems and Software, 2022

LoopPoint: Checkpoint-driven Sampled Simulation for Multi-threaded Applications.

Alen Sabu, Harish Patil, Wim Heirman, Trevor E. Carlson

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2022

2021

Automatic Sublining for Efficient Sparse Memory Accesses.

Wim Heirman, Stijn Eyerman, Kristof Du Bois, Ibrahim Hur

ACM Trans. Archit. Code Optim., 2021

Scale-Model Simulation.

Wenjie Liu, Wim Heirman, Stijn Eyerman, Shoaib Akram, Lieven Eeckhout

IEEE Comput. Archit. Lett., 2021

RIO: ROB-Centric In-Order Modeling of Out-of-Order Processors.

Wim Heirman, Stijn Eyerman, Kristof Du Bois, Ibrahim Hur

IEEE Comput. Archit. Lett., 2021

Modeling DRAM Timing in Parallel Simulators With Immediate-Response Memory Model.

Stijn Eyerman, Wim Heirman, Ibrahim Hur

IEEE Comput. Archit. Lett., 2021

Enabling Branch-Mispredict Level Parallelism by Selectively Flushing Instructions.

Stijn Eyerman, Wim Heirman, Sam Van den Steen, Ibrahim Hur

Proceedings of the MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, 2021

ELFies: Executable Region Checkpoints for Performance Analysis and Simulation.

Harish Patil, Alexander Isaev, Wim Heirman, Alen Sabu, Ali Hajiabadi, Trevor E. Carlson

Proceedings of the IEEE/ACM International Symposium on Code Generation and Optimization, 2021

2020

PIUMA: Programmable Integrated Unified Memory Architecture.

Sriram Aananthakrishnan, Nesreen K. Ahmed, Vincent Cavé, Marcelo Cintra, Yigit Demir, Kristof Du Bois, Stijn Eyerman, Joshua B. Fryman, Ivan Ganev, Wim Heirman, Hans-Christian Hoppe, Jason Howard, Ibrahim Hur, Midhunchandra Kodiyath, Samkit Jain, Daniel S. Klowden, Marek M. Landowski, Laurent Montigny, Ankit More, Przemyslaw Ossowski, Robert Pawlowski, Nick Pepperling, Fabrizio Petrini, Mariusz Sikora, Balasubramanian Seshasayee, Shaden Smith, Sebastian Szkoda, Sanjaya Tayal, Jesmin Jahan Tithi, Yves Vandriessche, Izajasz P. Wrosz

CoRR, 2020

Breaking In-Order Branch Miss Recovery.

Stijn Eyerman, Wim Heirman, Sam Van den Steen, Ibrahim Hur

IEEE Comput. Archit. Lett., 2020

Projecting Performance for PIUMA using Down-Scaled Simulation.

Stijn Eyerman, Wim Heirman, Yigit Demir, Kristof Du Bois, Ibrahim Hur

Proceedings of the 2020 IEEE High Performance Extreme Computing Conference, 2020

2018

Multi-Stage CPI Stacks.

Stijn Eyerman, Wim Heirman, Kristof Du Bois, Ibrahim Hur

IEEE Comput. Archit. Lett., 2018

Many-core graph workload analysis.

Stijn Eyerman, Wim Heirman, Kristof Du Bois, Joshua B. Fryman, Ibrahim Hur

Proceedings of the International Conference for High Performance Computing, 2018

Extending the Performance Analysis Tool Box: Multi-stage CPI Stacks and FLOPS Stacks.

Stijn Eyerman, Wim Heirman, Kristof Du Bois, Ibrahim Hur

Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2018

Near-side prefetch throttling: adaptive prefetching for high-performance many-core processors.

Wim Heirman, Kristof Du Bois, Yves Vandriessche, Stijn Eyerman, Ibrahim Hur

Proceedings of the 27th International Conference on Parallel Architectures and Compilation Techniques, 2018

2017

Shared resource aware scheduling on power-constrained tiled many-core processors.

Sudhanshu Shekhar Jha, Wim Heirman, Ayose Falcón, Jordi Tubella, Antonio González, Lieven Eeckhout

J. Parallel Distributed Comput., 2017

2016

Boosting the Priority of Garbage: Scheduling Collection on Heterogeneous Multicore Processors.

Shoaib Akram, Jennifer B. Sartor, Kenzo Van Craeynest, Wim Heirman, Lieven Eeckhout

ACM Trans. Archit. Code Optim., 2016

2015

Epoch Profiles: Microarchitecture-Based Application Analysis and Optimization.

Trevor E. Carlson, Siddharth Nilakantan, Mark Hempstead, Wim Heirman

IEEE Comput. Archit. Lett., 2015

The load slice core microarchitecture.

Trevor E. Carlson, Wim Heirman, Osman Allam, Stefanos Kaxiras, Lieven Eeckhout

Proceedings of the 42nd Annual International Symposium on Computer Architecture, 2015

Chrysso: an integrated power manager for constrained many-core processors.

Sudhanshu Shekhar Jha, Wim Heirman, Ayose Falcón, Trevor E. Carlson, Kenzo Van Craeynest, Jordi Tubella, Antonio González, Lieven Eeckhout

Proceedings of the 12th ACM International Conference on Computing Frontiers, 2015

2014

An Evaluation of High-Level Mechanistic Core Models.

Trevor E. Carlson, Wim Heirman, Stijn Eyerman, Ibrahim Hur, Lieven Eeckhout

ACM Trans. Archit. Code Optim., 2014

BarrierPoint: Sampled simulation of multi-threaded applications.

Trevor E. Carlson, Wim Heirman, Kenzo Van Craeynest, Lieven Eeckhout

Proceedings of the 2014 IEEE International Symposium on Performance Analysis of Systems and Software, 2014

Automatic SMT threading for OpenMP applications on the Intel Xeon Phi co-processor.

Wim Heirman, Trevor E. Carlson, Kenzo Van Craeynest, Ibrahim Hur, Aamer Jaleel, Lieven Eeckhout

Proceedings of the 4th International Workshop on Runtime and Operating Systems for Supercomputers, 2014

Undersubscribed threading on clustered cache architectures.

Wim Heirman, Trevor E. Carlson, Kenzo Van Craeynest, Ibrahim Hur, Aamer Jaleel, Lieven Eeckhout

Proceedings of the 20th IEEE International Symposium on High Performance Computer Architecture, 2014

Cooperative cache scrubbing.

Jennifer B. Sartor, Wim Heirman, Stephen M. Blackburn, Lieven Eeckhout, Kathryn S. McKinley

Proceedings of the International Conference on Parallel Architectures and Compilation, 2014

2013

PCantorSim: Accelerating parallel architecture simulation through fractal-based sampling.

Chuntao Jiang, Zhibin Yu, Hai Jin, Cheng-Zhong Xu, Lieven Eeckhout, Wim Heirman, Trevor E. Carlson, Xiaofei Liao

ACM Trans. Archit. Code Optim., 2013

Node Performance and Energy Analysis with the Sniper Multi-core Simulator.

Trevor E. Carlson, Wim Heirman, Kenzo Van Craeynest, Lieven Eeckhout

Proceedings of the Tools for High Performance Computing 2013, 2013

Making Communication a First-Class Citizen in Multicore Partitioning.

Poona Bahrebar, Ruxandra-Marina Florea, Wim Heirman, Leon Denis, Adrian Munteanu, Dirk Stroobandt

Proceedings of the 21st Euromicro International Conference on Parallel, 2013

Sampled simulation of multi-threaded applications.

Trevor E. Carlson, Wim Heirman, Lieven Eeckhout

Proceedings of the 2012 IEEE International Symposium on Performance Analysis of Systems & Software, 2013

Fairness-aware scheduling on single-ISA heterogeneous multi-cores.

Kenzo Van Craeynest, Shoaib Akram, Wim Heirman, Aamer Jaleel, Lieven Eeckhout

Proceedings of the 22nd International Conference on Parallel Architectures and Compilation Techniques, 2013

2012

The Impact of Global Communication Latency at Extreme Scales on Krylov Methods.

Thomas J. Ashby, Pieter Ghysels, Wim Heirman, Wim Vanroose

Proceedings of the Algorithms and Architectures for Parallel Processing, 2012

Power-aware multi-core simulation for early design stage hardware/software co-optimization.

Wim Heirman, Souradip Sarkar, Trevor E. Carlson, Ibrahim Hur, Lieven Eeckhout

Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, 2012

2011

Dynamic data folding with parameterizable FPGA configurations.

Karel Bruneel, Wim Heirman, Dirk Stroobandt

ACM Trans. Design Autom. Electr. Syst., 2011

Sniper: exploring the level of abstraction for scalable and accurate parallel multi-core simulation.

Trevor E. Carlson, Wim Heirman, Lieven Eeckhout

Proceedings of the Conference on High Performance Computing Networking, 2011

RecoNoC: A reconfigurable network-on-chip.

Robbe Vancayseele, Brahim Al Farisi, Wim Heirman, Karel Bruneel, Dirk Stroobandt

Proceedings of the 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2011

Using Fast and Accurate Simulation to Explore Hardware/Software Trade-offs in the Multi-Core Era.

Wim Heirman, Trevor E. Carlson, Souradip Sarkar, Pieter Ghysels, Wim Vanroose, Lieven Eeckhout

Proceedings of the Applications, Tools and Techniques on the Road to Exascale Computing, Proceedings of the conference ParCo 2011, 31 August, 2011

Using cycle stacks to understand scaling bottlenecks in multi-threaded workloads.

Wim Heirman, Trevor E. Carlson, Shuai Che, Kevin Skadron, Lieven Eeckhout

Proceedings of the 2011 IEEE International Symposium on Workload Characterization, 2011

Evaluating Application Vulnerability to Soft Errors in Multi-level Cache Hierarchy.

Zhe Ma, Trevor E. Carlson, Wim Heirman, Lieven Eeckhout

Proceedings of the Euro-Par 2011: Parallel Processing Workshops - CCPI, CGWS, HeteroPar, HiBB, HPCVirt, HPPC, HPSS, MDGS, ProPer, Resilience, UCHPC, VHPC, Bordeaux, France, August 29, 2011

2010

Performance evaluation for passive-type Optical network-on-chip.

Atef Allam, Ian O'Connor, Wim Heirman

Proceedings of the 21st IEEE International Symposium on Rapid System Prototyping, 2010

PinComm: Characterizing Intra-application Communication for the Many-Core Era.

Wim Heirman, Dirk Stroobandt, Narasinga Rao Miniskar, Roel Wuyts, Francky Catthoor

Proceedings of the 16th IEEE International Conference on Parallel and Distributed Systems, 2010

2009

Efficient memory management for hardware accelerated Java Virtual Machines.

Peter Bertels, Wim Heirman, Erik H. D'Hollander, Dirk Stroobandt

ACM Trans. Design Autom. Electr. Syst., 2009

Low-Power Reconfigurable Network Architecture for On-Chip Photonic Interconnects.

Iñigo Artundo, Wim Heirman, Mikel Loperena, Christof Debaes, Jan M. Van Campenhout, Hugo Thienpont

Proceedings of the 17th IEEE Symposium on High Performance Interconnects, 2009

Strategies for dynamic memory allocation in hybrid architectures.

Peter Bertels, Wim Heirman, Dirk Stroobandt

Proceedings of the 6th Conference on Computing Frontiers, 2009

2008

Predicting the performance of reconfigurable optical interconnects in distributed shared-memory systems.

Wim Heirman, Joni Dambre, Iñigo Artundo, Christof Debaes, Hugo Thienpont, Dirk Stroobandt, Jan Van Campenhout

Photonic Netw. Commun., 2008

Rent's rule and parallel programs: characterizing network traffic behavior.

Wim Heirman, Joni Dambre, Dirk Stroobandt, Jan M. Van Campenhout

Proceedings of the Tenth International Workshop on System-Level Interconnect Prediction (SLIP 2008), 2008

Efficient measurement of data flow enabling communication-aware parallelisation.

Peter Bertels, Wim Heirman, Dirk Stroobandt

Proceedings of the 1st international forum on Next-generation multicore/manycore technologies, 2008

2007

Predicting reconfigurable interconnect performance in distributed shared-memory systems.

Wim Heirman, Joni Dambre, Iñigo Artundo, Christof Debaes, Hugo Thienpont, Dirk Stroobandt, Jan M. Van Campenhout

Integr., 2007

Synthetic traffic generation as a tool for dynamic interconnect evaluation.

Wim Heirman, Joni Dambre, Jan Van Campenhout

Proceedings of the Ninth International Workshop on System-Level Interconnect Prediction (SLIP 2007), 2007

2006

Congestion modeling for reconfigurable inter-processor networks.

Wim Heirman, Joni Dambre, Jan M. Van Campenhout

Proceedings of the Eigth International Workshop on System-Level Interconnect Prediction (SLIP 2006), 2006

Reconfigurable Interconnects in DSM Systems: A Focus on Context Switch Behavior.

Iñigo Artundo, Daniel Manjarres, Wim Heirman, Christof Debaes, Joni Dambre, Jan M. Van Campenhout, Hugo Thienpont

Proceedings of the Frontiers of High Performance Computing and Networking, 2006

2005

Prediction model for evaluation of reconfigurable interconnects in distributed shared-memory systems.

Wim Heirman, Joni Dambre, Christof Debaes, Hugo Thienpont, Dirk Stroobandt, Jan Van Campenhout

Proceedings of the Seventh International Workshop on System-Level Interconnect Prediction (SLIP 2005), 2005

Traffic Temporal Analysis for Reconfigurable Interconnects in Shared-Memory Systems.

Wim Heirman, Joni Dambre, Jan Van Campenhout, Christof Debaes, Hugo Thienpont

Proceedings of the 19th International Parallel and Distributed Processing Symposium (IPDPS 2005), 2005