Kyriakos Georgiou

Orcid: 0000-0002-6017-3320

According to our database1, Kyriakos Georgiou authored at least 29 papers between 2013 and 2024.

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Bibliography

2024
Evaluating the Effects of Reducing Voltage Margins for Energy-Efficient Operation of MPSoCs.
IEEE Embed. Syst. Lett., March, 2024

2022
Robust and Accurate Fine-Grain Power Models for Embedded Systems With No On-Chip PMU.
IEEE Embed. Syst. Lett., 2022

Lost In Translation: Exposing Hidden Compiler Optimization Opportunities.
Comput. J., 2022

Accurate Energy Modelling on the Cortex-M0 Processor for Profiling and Static Analysis.
Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022

2021
Markov chain lumpability and applications to credit risk modelling in compliance with the International Financial Reporting Standard 9 framework.
Eur. J. Oper. Res., 2021

Security-Hardening Software Libraries with Ada and SPARK - A TCP Stack Use Case.
CoRR, 2021

A Comprehensive and Accurate Energy Model for Arm's Cortex-M0 Processor.
CoRR, 2021

Layered Formal Verification of a TCP Stack.
Proceedings of the IEEE Secure Development Conference, 2021

2020
Performance and Energy Trade-Offs for Parallel Applications on Heterogeneous Multi-Processing Systems.
CoRR, 2020

When Parallel Speedups Hit the Memory Wall.
IEEE Access, 2020

2019
Exploiting guard band limits for energy gains in MPSoCs.
Proceedings of the 27th IFIP/IEEE International Conference on Very Large Scale Integration, 2019

Performance and Energy Efficiency Trade-Offs in Single-ISA Heterogeneous Multi-Processing for Parallel Applications.
Proceedings of the 27th IFIP/IEEE International Conference on Very Large Scale Integration, 2019

Energy-Optimal Configurations for Single-Node HPC Applications.
Proceedings of the 17th International Conference on High Performance Computing & Simulation, 2019

2018
The IoT Energy Challenge: A Software Perspective.
IEEE Embed. Syst. Lett., 2018

Energy-Optimal Configurations for Single-Node HPC Applications.
CoRR, 2018

Application Speedup Characterization: Modeling Parallelization Overhead and Variations of Problem Size and Number of Cores.
Proceedings of the Companion of the 2018 ACM/SPEC International Conference on Performance Engineering, 2018

Less is More: Exploiting the Standard Compiler Optimization Levels for Better Performance and Energy Consumption.
Proceedings of the 21st International Workshop on Software and Compilers for Embedded Systems, 2018

2017
Enabling energy transparency for deeply embedded programs.
PhD thesis, 2017

Energy Transparency for Deeply Embedded Programs.
ACM Trans. Archit. Code Optim., 2017

Internet-Based Indoor Navigation Services.
IEEE Internet Comput., 2017

The Benefits of Low Operating Voltage Devices to the Energy Efficiency of Parallel Systems.
CoRR, 2017

A Survey of Hardware Technologies for Mixed-Critical Integration Explored in the Project EMC^2.
Proceedings of the Computer Safety, Reliability, and Security, 2017

2016
ENTRA: Whole-systems energy transparency.
Microprocess. Microsystems, 2016

2015
On the Value and Limits of Multi-level Energy Consumption Static Analysis for Deeply Embedded Single and Multi-threaded Programs.
CoRR, 2015

Static analysis of energy consumption for LLVM IR programs.
Proceedings of the 18th International Workshop on Software and Compilers for Embedded Systems, 2015

Anyplace: A Crowdsourced Indoor Information Service.
Proceedings of the 16th IEEE International Conference on Mobile Data Management, 2015

Inferring Parametric Energy Consumption Functions at Different Software Levels: ISA vs. LLVM IR.
Proceedings of the Foundational and Practical Aspects of Resource Analysis, 2015

2014
Static energy consumption analysis of LLVM IR programs.
CoRR, 2014

2013
Energy Consumption Analysis of Programs Based on XMOS ISA-Level Models.
Proceedings of the Logic-Based Program Synthesis and Transformation, 2013


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