Zbigniew Chamski

According to our database1, Zbigniew Chamski authored at least 17 papers between 1992 and 2019.

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Bibliography

2019
Lost in translation: Exposing hidden compiler optimization opportunities.
CoRR, 2019

2017
Energy Transparency for Deeply Embedded Programs.
TACO, 2017

2015
Synchronous Reactive Nano-Kernels: Exploring the Limits of Power and Energy Efficiency in Embedded Systems.
Proceedings of the 18th International Workshop on Software and Compilers for Embedded Systems, 2015

2014
Collective mind: Towards practical and collaborative auto-tuning.
Scientific Programming, 2014

2011
ACOTES Project: Advanced Compiler Technologies for Embedded Streaming.
International Journal of Parallel Programming, 2011

Milepost GCC: Machine Learning Enabled Self-tuning Compiler.
International Journal of Parallel Programming, 2011

2002
Multi-periodic Process Networks: Prototyping and Verifying Stream-Processing Systems.
Proceedings of the Euro-Par 2002, 2002

1999
OCEANS - Optimising Compilers for Embedded Applications.
Proceedings of the Euro-Par '99 Parallel Processing, 5th International Euro-Par Conference, Toulouse, France, August 31, 1999

1998

1997

1996
Practical Loop Generation.
Proceedings of the 29th Annual Hawaii International Conference on System Sciences (HICSS-29), 1996

1995
Enumeration of dense non-convex iteration sets.
Proceedings of the 3rd Euromicro Workshop on Parallel and Distributed Processing (PDP '95), 1995

How Efficient Can Loop Generation Be?.
Proceedings of the Parallel Computing: State-of-the-Art and Perspectives, 1995

Beyond convexity: scanning 'non-convex polyhedra'.
Proceedings of the 28th Annual Hawaii International Conference on System Sciences (HICSS-28), 1995

1994
Nested Loop Sequences: Towards Efficient Loop Structures in Automatic Parallelization.
Proceedings of the 27th Annual Hawaii International Conference on System Sciences (HICSS-27), 1994

1993
Fast and Efficient Generation of Loop Bounds.
Proceedings of the Parallel Computing: Trends and Applications, 1993

1992
Generating Memory-Efficient Imperative Data Structures from Systolic Programs.
Proceedings of the PARLE '92: Parallel Architectures and Languages Europe, 1992


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