Lanlan Cui
Orcid: 0000-0002-9509-741X
According to our database1,
Lanlan Cui authored at least 14 papers
between 2019 and 2026.
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Bibliography
2026
Enhanced LDPC Coding for 3-D TLC NAND Flash Memory: Leveraging RBER Difference From Intralayer Variation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., March, 2026
IEEE Trans. Cloud Comput., 2026
2025
Int. J. Mach. Learn. Cybern., September, 2025
AsLDPC: Improving Decoding Performance With Absorbing Set Characteristic Aware Low-Density Parity-Check Code.
IEEE Trans. Consumer Electron., August, 2025
Proceedings of the Design, Automation & Test in Europe Conference, 2025
Proceedings of the Design, Automation & Test in Europe Conference, 2025
2024
Proceedings of the International Conference on Networking and Network Applications, 2024
Read-Optimized Persistent Hash Index for Query Acceleration through Fingerprint Filtering and Lock-Free Prefetching.
Proceedings of the 42nd IEEE International Conference on Computer Design, 2024
Proceedings of the 42nd IEEE International Conference on Computer Design, 2024
2023
Learning-Based Collaborative Service Placement for AI-oriented Mobile Edge Computing.
Proceedings of the Eleventh International Conference on Advanced Cloud and Big Data, 2023
2022
Improving LDPC Decoding Performance for 3D TLC NAND Flash by LLR Optimization Scheme for Hard and Soft Decision.
ACM Trans. Design Autom. Electr. Syst., 2022
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
2020
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
2019
VaLLR: Threshold Voltage Distribution Aware LLR Optimization to Improve LDPC Decoding Performance for 3D TLC NAND Flash.
Proceedings of the 37th IEEE International Conference on Computer Design, 2019