Fei Wu

Orcid: 0000-0001-9746-4714

Affiliations:

Huazhong University of Science and Technology, Key Lab of Data Storage Systems, Wuhan, China
Wuhan National Laboratory for Optoelectronics, Wuhan, China

According to our database¹, Fei Wu authored at least 84 papers between 2010 and 2023.

Collaborative distances:

Dijkstra number² of four.
Erdős number³ of four.

Timeline

Legend:

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In proceedings

Article

PhD thesis

Dataset

Other

Bibliography

2023

Exploiting the Single-Symbol LLR Variation to Accelerate LDPC Decoding for 3-D nand Flash Memory.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., December, 2023

Pipette: Efficient Fine-Grained Reads for SSDs.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., December, 2023

Holistic and Opportunistic Scheduling of Background I/Os in Flash-Based SSDs.

[BibT_eX]

[DOI]

IEEE Trans. Computers, November, 2023

High-Precision Short-Term Lifetime Prediction in TLC 3-D NAND Flash Memory as Hot-Data Storage.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., October, 2023

eLDPC: An Efficient LDPC Coding Scheme for Phase-Change Memory.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., June, 2023

Exploiting Metadata to Estimate Read Reference Voltage for 3-D nand Flash Memory.

[BibT_eX]

[DOI]

IEEE Trans. Consumer Electron., February, 2023

ALCod: Adaptive LDPC Coding for 3-D NAND Flash Memory Using Inter-Layer RBER Variation.

[BibT_eX]

[DOI]

IEEE Trans. Consumer Electron., 2023

ADT-FSE: A New Encoder for SZ.

[BibT_eX]

[DOI]

Proceedings of the International Conference for High Performance Computing, 2023

FlexZNS: Building High-Performance ZNS SSDs with Size-Flexible and Parity-Protected Zones.

[BibT_eX]

[DOI]

Proceedings of the 41st IEEE International Conference on Computer Design, 2023

2022

Characterization Summary of Performance, Reliability, and Threshold Voltage Distribution of 3D Charge-Trap NAND Flash Memory.

[BibT_eX]

[DOI]

ACM Trans. Storage, 2022

Improving LDPC Decoding Performance for 3D TLC NAND Flash by LLR Optimization Scheme for Hard and Soft Decision.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., 2022

Understanding and Exploiting the Full Potential of SSD Address Remapping.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

WA-OPShare: Workload-Adaptive Over-Provisioning Space Allocation for Multi-Tenant SSDs.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Optimal Program-Read Schemes Toward Highly Reliable Open Block Operations in 3-D Charge-Trap NAND Flash Memory.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

A Low Bit-Width LDPC Min-Sum Decoding Scheme for NAND Flash.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

PACA: A Page Type Aware Read Cache Scheme in QLC Flash-based SSDs.

[BibT_eX]

[DOI]

Proceedings of the IEEE 40th International Conference on Computer Design, 2022

Error Generation for 3D NAND Flash Memory.

[BibT_eX]

[DOI]

Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

Work-in-Progress: High-Precision Short-Term Lifetime Prediction in TLC 3D NAND Flash Memory as Hot-data Storage.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Compilers, 2022

Tiered Hashing: Revamping Hash Indexing under a Unified Memory-Storage Hierarchy.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, 2022

2021

LiveSSD: A Low-Interference RAID Scheme for Hardware Virtualized SSDs.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

An Efficient Data Migration Scheme to Optimize Garbage Collection in SSDs.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

DEPS: Exploiting a Dynamic Error Prechecking Scheme to Improve the Read Performance of SSD.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

Write-Optimized B<sup>+</sup> Tree Index Technology for Persistent Memory.

[BibT_eX]

[DOI]

J. Comput. Sci. Technol., 2021

Seer-SSD: Bridging Semantic Gap between Log-Structured File Systems and SSDs to Reduce SSD Write Amplification.

[BibT_eX]

[DOI]

Proceedings of the 39th IEEE International Conference on Computer Design, 2021

Intelligent Prediction of Flash Lifetime via Online Domain Adaptation.

[BibT_eX]

[DOI]

Ruixiang Ma

Fei Wu

Changsheng Xie

Proceedings of the 39th IEEE International Conference on Computer Design, 2021

Remap-SSD: Safely and Efficiently Exploiting SSD Address Remapping to Eliminate Duplicate Writes.

[BibT_eX]

[DOI]

Proceedings of the 19th USENIX Conference on File and Storage Technologies, 2021

SW-WAL: Leveraging Address Remapping of SSDs to Achieve Single-Write Write-Ahead Logging.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

Modeling of Threshold Voltage Distribution in 3D NAND Flash Memory.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

2020

Using Error Modes Aware LDPC to Improve Decoding Performance of 3-D TLC NAND Flash.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

BlockHammer: Improving Flash Reliability by Exploiting Process Variation Aware Proactive Failure Prediction.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

LUDA: Boost LSM Key Value Store Compactions with GPUs.

[BibT_eX]

[DOI]

CoRR, 2020

Architecting Heterogeneous Memory Systems with DRAM Technology Only: A Case Study on Relational Database.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM Workshop on Memory Centric High Performance Computing, 2020

Disperse Access Considered Energy Inefficiency in Intel Optane DC Persistent Memory Servers.

[BibT_eX]

[DOI]

Proceedings of the 40th IEEE International Conference on Distributed Computing Systems, 2020

BeLDPC: Bit Errors Aware Adaptive Rate LDPC Codes for 3D TLC NAND Flash Memory.

[BibT_eX]

[DOI]

Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2019

Pair-Bit Errors Aware LDPC Decoding in MLC NAND Flash Memory.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

SCORE: A Novel Scheme to Efficiently Cache Overlong ECCs in NAND Flash Memory.

[BibT_eX]

[DOI]

ACM Trans. Archit. Code Optim., 2019

RBER-Aware Lifetime Prediction Scheme for 3D-TLC NAND Flash Memory.

[BibT_eX]

[DOI]

IEEE Access, 2019

VaLLR: Threshold Voltage Distribution Aware LLR Optimization to Improve LDPC Decoding Performance for 3D TLC NAND Flash.

[BibT_eX]

[DOI]

Proceedings of the 37th IEEE International Conference on Computer Design, 2019

RAFS: A RAID-Aware File System to Reduce the Parity Update Overhead for SSD RAID.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

Characterizing the Reliability and Threshold Voltage Shifting of 3D Charge Trap NAND Flash.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

WAS: Wear Aware Superblock Management for Prolonging SSD Lifetime.

[BibT_eX]

[DOI]

Proceedings of the 56th Annual Design Automation Conference 2019, 2019

2018

Characterizing 3D Floating Gate NAND Flash: Observations, Analyses, and Implications.

[BibT_eX]

[DOI]

ACM Trans. Storage, 2018

WARD: Wear Aware RAID Design Within SSDs.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

RBER Aware Multi-Sensing for Improving Read Performance of 3D MLC NAND Flash Memory.

[BibT_eX]

[DOI]

IEEE Access, 2018

Exploiting Minipage-Level Mapping to Improve Write Efficiency of NAND Flash.

[BibT_eX]

[DOI]

Proceedings of the 2018 IEEE International Conference on Networking, 2018

Characterizing 3D Charge Trap NAND Flash: Observations, Analyses and Applications.

[BibT_eX]

[DOI]

Proceedings of the 36th IEEE International Conference on Computer Design, 2018

OSPADA: One-Shot Programming Aware Data Allocation Policy to Improve 3D NAND Flash Read Performance.

[BibT_eX]

[DOI]

Proceedings of the 36th IEEE International Conference on Computer Design, 2018

HODS: Hardware Object Deserialization Inside SSD Storage.

[BibT_eX]

[DOI]

Proceedings of the 26th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2018

Program error rate-based wear leveling for NAND flash memory.

[BibT_eX]

[DOI]

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

FastGC: accelerate garbage collection via an efficient copyback-based data migration in SSDs.

[BibT_eX]

[DOI]

Proceedings of the 55th Annual Design Automation Conference, 2018

2017

Understanding and Alleviating the Impact of the Flash Address Translation on Solid State Devices.

[BibT_eX]

[DOI]

ACM Trans. Storage, 2017

Building Efficient Key-Value Stores via a Lightweight Compaction Tree.

[BibT_eX]

[DOI]

ACM Trans. Storage, 2017

A Program Interference Error Aware LDPC Scheme for Improving NAND Flash Decoding Performance.

[BibT_eX]

[DOI]

ACM Trans. Embed. Comput. Syst., 2017

Extending Real-Time Analysis for Wormhole NoCs.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2017

一种固态盘的读写性能优化调度方法 (Read-Write Performance Optimization Scheduling Scheme for SSD).

[BibT_eX]

[DOI]

计算机科学, 2017

Modeling recommender systems via weighted bipartite network.

[BibT_eX]

[DOI]

Concurr. Comput. Pract. Exp., 2017

Characterizing 3D Floating Gate NAND Flash.

[BibT_eX]

[DOI]

Proceedings of the 2017 ACM SIGMETRICS / International Conference on Measurement and Modeling of Computer Systems, Urbana-Champaign, IL, USA, June 05, 2017

ALARM: A Location-Aware Redistribution Method to Improve 3D FG NAND Flash Reliability.

[BibT_eX]

[DOI]

Proceedings of the 2017 International Conference on Networking, Architecture, and Storage, 2017

OptiMatch: Enabling an Optimal Match between Green Power and Various Workloads for Renewable-Energy Powered Storage Systems.

[BibT_eX]

[DOI]

Proceedings of the 46th International Conference on Parallel Processing, 2017

CooECC: A Cooperative Error Correction Scheme to Reduce LDPC Decoding Latency in NAND Flash.

[BibT_eX]

[DOI]

Proceedings of the 2017 IEEE International Conference on Computer Design, 2017

FPGA-based failure mode testing and analysis for MLC NAND flash memory.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

Lifetime adaptive ECC in NAND flash page management.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

Alert-and-transfer: an evolutionary architecture for SSD-based storage systems.

[BibT_eX]

[DOI]

Proceedings of the Twelfth IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis Companion, 2017

A Concurrent Skip List Balanced on Search.

[BibT_eX]

[DOI]

Proceedings of the Advanced Parallel Processing Technologies, 2017

2016

TEES: A novel multiple criteria optimization scheme for temperature-constrained energy efficient storage.

[BibT_eX]

[DOI]

J. Parallel Distributed Comput., 2016

Determining Image Base of Firmware Files for ARM Devices.

[BibT_eX]

[DOI]

IEICE Trans. Inf. Syst., 2016

REAL: A retention error aware LDPC decoding scheme to improve NAND flash read performance.

[BibT_eX]

[DOI]

Proceedings of the 32nd Symposium on Mass Storage Systems and Technologies, 2016

Leveraging Semantic Links for High Efficiency Page-Level FTL Design.

[BibT_eX]

[DOI]

Proceedings of the 36th IEEE International Conference on Distributed Computing Systems Workshops, 2016

MRAMsim: A Simulator for Magnetoresistive RAM.

[BibT_eX]

[DOI]

Proceedings of the 36th IEEE International Conference on Distributed Computing Systems Workshops, 2016

Error behaviors testing with temperature and magnetism dependency for MRAM.

[BibT_eX]

[DOI]

Proceedings of the 34th IEEE International Conference on Computer Design, 2016

Real-Time Analysis for Wormhole NoC: Revisited and Revised.

[BibT_eX]

[DOI]

Proceedings of the 26th edition on Great Lakes Symposium on VLSI, 2016

2015

The information hiding mechanism based on compressed document format.

[BibT_eX]

[DOI]

Int. J. Comput. Sci. Math., 2015

On the Cooling of Energy Efficient Storage.

[BibT_eX]

[DOI]

Proceedings of the 10th IEEE International Conference on Networking, 2015

A novel optimization algorithm for Chien search of BCH Codes in NAND flash memory devices.

[BibT_eX]

[DOI]

Proceedings of the 10th IEEE International Conference on Networking, 2015

An efficient page-level FTL to optimize address translation in flash memory.

[BibT_eX]

[DOI]

Proceedings of the Tenth European Conference on Computer Systems, 2015

2014

sJournal: A New Design of Journaling for File Systems to Provide Crash Consistency.

[BibT_eX]

[DOI]

Proceedings of the 9th IEEE International Conference on Networking, 2014

2013

Measuring and Analyzing Write Amplification Characteristics of Solid State Disks.

[BibT_eX]

[DOI]

Proceedings of the 2013 IEEE 21st International Symposium on Modelling, 2013

Revisiting Behavior Amplification of NAND Flash-Based Storage Devices in Embedded Systems.

[BibT_eX]

[DOI]

Proceedings of the IEEE 11th International Conference on Dependable, 2013

2012

INBI: An Improved Network-Based Inference Recommendation Algorithm.

[BibT_eX]

[DOI]

Proceedings of the Seventh IEEE International Conference on Networking, 2012

2011

MIND: A black-box energy consumption model for disk arrays.

[BibT_eX]

[DOI]

Proceedings of the 2011 International Green Computing Conference and Workshops, 2011

Analysis of the File System and Block IO Scheduler for SSD in Performance and Energy Consumption.

[BibT_eX]

[DOI]

Proceedings of the 2011 IEEE Asia-Pacific Services Computing Conference, 2011

2010

A Low Cost and Inner-round Pipelined Design of ECB-AES-256 Crypto Engine for Solid State Disk.

[BibT_eX]

[DOI]

Fei Wu

Liang Wang

Jiguang Wan

Proceedings of the Fifth International Conference on Networking, Architecture, and Storage, 2010

Cache Blocks: An Efficient Scheme for Solid State Drives without DRAM Cache.

[BibT_eX]

[DOI]

Fei Wu

Xiang Chen

Jiguang Wan

Proceedings of the Fifth International Conference on Networking, Architecture, and Storage, 2010

TRACER: A Trace Replay Tool to Evaluate Energy-Efficiency of Mass Storage Systems.

[BibT_eX]

[DOI]

Proceedings of the 2010 IEEE International Conference on Cluster Computing, 2010

Fei Wu

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