Leandro Passetti

According to our database, Leandro Passetti authored at least 7 papers between 2018 and 2023.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2023

Adaptive Digital Compensation of Analog Impairments in Frequency Interleaved ADC for Next-Generation High-Speed Communication Receivers.

Leandro Passetti, Damián A. Morero, Benjamín T. Reyes, Mario R. Hueda

IEEE Access, 2023

Evaluation of the Performance Impact of Clock Jitter and Phase Noise in a Two-Band Frequency-Interleaved ADC.

Leandro Passetti, Benjamín T. Reyes, Damián A. Morero, Mario R. Hueda

Proceedings of the 30th IEEE International Conference on Electronics, Circuits and Systems, 2023

2021

A 4GS/s 8-bit time-interleaved SAR ADC with an energy-efficient architecture in 130 nm CMOS.

Fredy Solis, Álvaro Fernandez Bocco, Agustin C. Galetto, Leandro Passetti, Mario R. Hueda, Benjamín T. Reyes

Int. J. Circuit Theory Appl., 2021

Reduced Complexity Backpropagation-Based Adaptive Compensation of Frequency Interleaved ADC for Digital Communication Receivers.

Leandro Passetti, Benjamín T. Reyes, Damián A. Morero, Mario R. Hueda

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2020

Backpropagation-Based Background Compensation of Frequency Interleaved ADC for Coherent Optical Receivers.

Leandro Passetti, Agustin C. Galetto, Diego J. Hernando, Damián A. Morero, Benjamín T. Reyes, Mario R. Hueda

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019

An Energy-Efficient Hierarchical Architecture for Time-Interleaved SAR ADC.

Benjamín T. Reyes, Laura Biolato, Agustin C. Galetto, Leandro Passetti, Fredy Solis, Mario R. Hueda

IEEE Trans. Circuits Syst. I Regul. Pap., 2019

2018

An 8-bit 3.2GS/S CMOS time-interleaved SAR ADC with non-buffered input demultiplexing.

Benjamín T. Reyes, Laura Biolato, Agustin C. Galetto, Leandro Passetti, Fredy Solis, Mario R. Hueda

Proceedings of the 9th IEEE Latin American Symposium on Circuits & Systems, 2018