Fredy Solis

Orcid: 0000-0003-2608-2350

According to our database1, Fredy Solis authored at least 9 papers between 2018 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
18.4 A 200GS/s 8b 20fJ/c-s Receiver with >60GHz AFE Bandwidth for 800Gb/s Optical Coherent Communications in 5nm FinFET.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024

18.3 An 8b 160GS/s 57GHz Bandwidth Time-Interleaved DAC and Driver-Based Transmitter with Adaptive Calibration for 800Gb/s Coherent Optical Applications in 5nm.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024

2022
Error-Backpropagation-Based Background Calibration of TI-ADC for Adaptively Equalized Digital Communication Receivers.
IEEE Access, 2022

2021
A 4GS/s 8-bit time-interleaved SAR ADC with an energy-efficient architecture in 130 nm CMOS.
Int. J. Circuit Theory Appl., 2021

An Error Backpropagation-based Background Calibration of Pipeline TI-ADCs for 256-QAM Optical Coherent Receivers.
Proceedings of the 12th IEEE Latin America Symposium on Circuits and System, 2021

Experimental Evaluation of Backpropagation-Based Background Compensation of TI-ADC with Application to Digital Communication Receivers.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2020
Background Calibration of Time-Interleaved ADC for Optical Coherent Receivers using Error Backpropagation Techniques.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019
An Energy-Efficient Hierarchical Architecture for Time-Interleaved SAR ADC.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

2018
An 8-bit 3.2GS/S CMOS time-interleaved SAR ADC with non-buffered input demultiplexing.
Proceedings of the 9th IEEE Latin American Symposium on Circuits & Systems, 2018


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