Benjamín T. Reyes

Orcid: 0000-0003-4903-3498

According to our database1, Benjamín T. Reyes authored at least 25 papers between 2012 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
18.4 A 200GS/s 8b 20fJ/c-s Receiver with >60GHz AFE Bandwidth for 800Gb/s Optical Coherent Communications in 5nm FinFET.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024

18.3 An 8b 160GS/s 57GHz Bandwidth Time-Interleaved DAC and Driver-Based Transmitter with Adaptive Calibration for 800Gb/s Coherent Optical Applications in 5nm.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024

2023
Adaptive Digital Compensation of Analog Impairments in Frequency Interleaved ADC for Next-Generation High-Speed Communication Receivers.
IEEE Access, 2023

Digital Background Compensation of Analog Impairments in Jointly Frequency-Time Interleaved DACs.
IEEE Access, 2023

Evaluation of the Performance Impact of Clock Jitter and Phase Noise in a Two-Band Frequency-Interleaved ADC.
Proceedings of the 30th IEEE International Conference on Electronics, Circuits and Systems, 2023

2022
Error-Backpropagation-Based Background Calibration of TI-ADC for Adaptively Equalized Digital Communication Receivers.
IEEE Access, 2022

Reduced Complexity Adaptive Background Compensation of Electro-Optic Tx Impairments in Coherent Optical Transceivers.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2022

Backpropagation Based Background Compensation of TI-DAC Errors in High-Speed Transmitters.
Proceedings of the 65th IEEE International Midwest Symposium on Circuits and Systems, 2022

2021
A 4GS/s 8-bit time-interleaved SAR ADC with an energy-efficient architecture in 130 nm CMOS.
Int. J. Circuit Theory Appl., 2021

Adaptive Background Compensation of Frequency Interleaved DACs With Application to Coherent Optical Transceivers.
IEEE Access, 2021

Background Compensation of Frequency Interleaved DAC for Optical Transceivers.
Proceedings of the 12th IEEE Latin America Symposium on Circuits and System, 2021

An Error Backpropagation-based Background Calibration of Pipeline TI-ADCs for 256-QAM Optical Coherent Receivers.
Proceedings of the 12th IEEE Latin America Symposium on Circuits and System, 2021

8.6 A Highly Reconfigurable 40-97GS/s DAC and ADC with 40GHz AFE Bandwidth and Sub-35fJ/conv-step for 400Gb/s Coherent Optical Applications in 7nm FinFET.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021

Experimental Evaluation of Backpropagation-Based Background Compensation of TI-ADC with Application to Digital Communication Receivers.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

Reduced Complexity Backpropagation-Based Adaptive Compensation of Frequency Interleaved ADC for Digital Communication Receivers.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2020
Background Calibration of Time-Interleaved ADC for Optical Coherent Receivers using Error Backpropagation Techniques.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Backpropagation-Based Background Compensation of Frequency Interleaved ADC for Coherent Optical Receivers.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019
An Energy-Efficient Hierarchical Architecture for Time-Interleaved SAR ADC.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

2018
An 8-bit 3.2GS/S CMOS time-interleaved SAR ADC with non-buffered input demultiplexing.
Proceedings of the 9th IEEE Latin American Symposium on Circuits & Systems, 2018

2017
Design and Experimental Evaluation of a Time-Interleaved ADC Calibration Algorithm for Application in High-Speed Communication Systems.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017

2016
Efficient Estimation and Correction of Mismatch Errors in Time-Interleaved ADCs.
IEEE Trans. Instrum. Meas., 2016

An FPGA-based emulation platform for evaluation of time-interleaved ADC calibration systems.
Proceedings of the IEEE 7th Latin American Symposium on Circuits & Systems, 2016

2014
A 6-bit 2GS/s CMOS time-interleaved ADC for analysis of mixed-signal calibration techniques.
Proceedings of the IEEE 5th Latin American Symposium on Circuits and Systems, 2014

A 1.6Gb/s CMOS LVDS transmitter with a programmable pre-emphasis system.
Proceedings of the IEEE 5th Latin American Symposium on Circuits and Systems, 2014

2012
Joint sampling-time error and channel skew calibration of time-interleaved ADC in multichannel fiber optic receivers.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012


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