Leonardo B. Moraes

Orcid: 0000-0002-5152-319X

According to our database1, Leonardo B. Moraes authored at least 8 papers between 2018 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2021
Current Behavior on Process Variability Aware FinFET Inverter Designs.
Proceedings of the 12th IEEE Latin America Symposium on Circuits and System, 2021

2020
Circuit Level Design Methods to Mitigate Soft Errors.
Proceedings of the IEEE Latin-American Test Symposium, 2020

Pros and Cons of ST and SIG FinFET Inverters for Low Power Designs.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019
Robust FinFET Schmitt Trigger Designs for Low Power Applications.
Proceedings of the VLSI-SoC: New Technology Enabler, 2019

Robustness and Minimum Energy-Oriented FinFET Design.
Proceedings of the 27th IFIP/IEEE International Conference on Very Large Scale Integration, 2019

Minimum Energy FinFET Schmitt Trigger Design Considering Process Variability.
Proceedings of the 27th IFIP/IEEE International Conference on Very Large Scale Integration, 2019

Exploring Schmitt Trigger Circuits for Process Variability Mitigation.
Proceedings of the 17th IEEE International New Circuits and Systems Conference, 2019

2018
Evaluation of variability using Schmitt trigger on full adders layout.
Microelectron. Reliab., 2018


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