Leonardo Vera

Orcid: 0000-0002-0897-9896

According to our database1, Leonardo Vera authored at least 10 papers between 2012 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
A Dual-Polarization Silicon-Photonic Coherent Receiver Front-End Supporting 528 Gb/s/Wavelength.
IEEE J. Solid State Circuits, 2023

2019

A 6V Swing 3.6% THD >40GHz Driver with 4.5× Bandwidth Extension for a 272Gb/s Dual-Polarization 16-QAM Silicon Photonic Transmitter.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019

2017
A 40-Gb/s SiGe-BiCMOS MZM Driver With 6-V<sub>p-p</sub> Output and On-Chip Digital Calibration.
IEEE J. Solid State Circuits, 2017

2016
A 40-Gb/s 2<sup>11</sup>-1 PRBS With Distributed Clocking and a Trigger Countdown Output.
IEEE Trans. Circuits Syst. II Express Briefs, 2016

Erratum to "A DC-100 GHz Active Frequency Doubler With a Low-Voltage Multiplier Core".
IEEE J. Solid State Circuits, 2016

2015
A DC-100 GHz Active Frequency Doubler With a Low-Voltage Multiplier Core.
IEEE J. Solid State Circuits, 2015

2014
A 10 Gb/s, 6 V p-p , Digitally Controlled, Differential Distributed Amplifier MZM Driver.
IEEE J. Solid State Circuits, 2014

2013
A 10Gb/s 6Vpp differential modulator driver in 0.18µm SiGe-BiCMOS.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

2012
Passive Circuit Technologies for mm-Wave Wireless Systems on Silicon.
IEEE Trans. Circuits Syst. I Regul. Pap., 2012


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