Lingqi Zhang

Orcid: 0000-0002-2452-1551

Affiliations:
  • Tokyo Institute of Technology, Tokyo, Japan


According to our database1, Lingqi Zhang authored at least 16 papers between 2020 and 2026.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

Online presence:

On csauthors.net:

Bibliography

2026
SHIRO: Near-Optimal Communication Strategies for Distributed Sparse Matrix Multiplication.
Proceedings of the 40th ACM International Conference on Supercomputing, 2026

FRUGAL: Pushing GPU Applications beyond Memory Limits.
Proceedings of the IEEE/ACM International Symposium on Code Generation and Optimization, 2026

2025
SHIRO: Near-Optimal Communication Strategies for Distributed Sparse Matrix Multiplication.
CoRR, December, 2025

A General and Scalable GCN Training Framework on CPU Supercomputers.
Proceedings of the 30th ACM SIGPLAN Annual Symposium on Principles and Practice of Parallel Programming, 2025

Scaling Large-scale GNN Training to Thousands of Processors on CPU-based Supercomputers.
Proceedings of the 39th ACM International Conference on Supercomputing, 2025

Can Tensor Cores Benefit Memory-Bound Kernels? (NO!).
Proceedings of the 17th Workshop on General Purpose Processing Using GPU, 2025

2024
Investigating Nvidia GPU Architecture Trends via Microbenchmarks.
Proceedings of the IEEE International Conference on Cluster Computing, 2024

2023
At the Locus of Performance: Quantifying the Effects of Copious 3D-Stacked Cache on HPC Workloads.
ACM Trans. Archit. Code Optim., December, 2023

Revisiting Temporal Blocking Stencil Optimizations.
Proceedings of the 37th International Conference on Supercomputing, 2023

PERKS: a Locality-Optimized Execution Model for Iterative Memory-bound GPU Applications.
Proceedings of the 37th International Conference on Supercomputing, 2023

Exploiting Scratchpad Memory for Deep Temporal Blocking: A case study for 2D Jacobian 5-point iterative stencil kernel (j2d5pt).
Proceedings of the 15th Workshop on General Purpose Processing Using GPU, 2023

2022
At the Locus of Performance: A Case Study in Enhancing CPUs with Copious 3D-Stacked Cache.
CoRR, 2022

Persistent Kernels for Iterative Memory-bound GPU Applications.
CoRR, 2022

2021
Matrix Engines for High Performance Computing: A Paragon of Performance or Grasping at Straws?
Proceedings of the 35th IEEE International Parallel and Distributed Processing Symposium, 2021

2020
Scaling distributed deep learning workloads beyond the memory capacity with KARMA.
Proceedings of the International Conference for High Performance Computing, 2020

A Study of Single and Multi-device Synchronization Methods in Nvidia GPUs.
Proceedings of the 2020 IEEE International Parallel and Distributed Processing Symposium (IPDPS), 2020


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