Lingxiang Xiang

According to our database1, Lingxiang Xiang authored at least 12 papers between 2007 and 2017.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

2017
Performance Improvement via Always-Abort HTM.
Proceedings of the 26th International Conference on Parallel Architectures and Compilation Techniques, 2017

2016
Sparso: Context-driven Optimizations of Sparse Linear Algebra.
Proceedings of the 2016 International Conference on Parallel Architectures and Compilation, 2016

2015
Conflict Reduction in Hardware Transactions Using Advisory Locks.
Proceedings of the 27th ACM on Symposium on Parallelism in Algorithms and Architectures, 2015

Software partitioning of hardware transactions.
Proceedings of the 20th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2015

2013
Compiler aided manual speculation for high performance concurrent data structures.
Proceedings of the ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2013

2010
Shared Register File Based ILP for Multicore.
Proceedings of the 2010 IEEE/ACM Int'l Conference on Green Computing and Communications, 2010

Global Register Alias Table: Executing Sequential Program on Multi-Core.
Proceedings of the 10th IEEE International Conference on Computer and Information Technology, 2010

2009
Less reused filter: improving l2 cache performance via filtering less reused lines.
Proceedings of the 23rd international conference on Supercomputing, 2009

L1 Collective Cache: Managing Shared Data for Chip Multiprocessors.
Proceedings of the Advanced Parallel Processing Technologies, 8th International Symposium, 2009

2008
Dynamic power management framework for multi-core portable embedded system.
Proceedings of the 1st international forum on Next-generation multicore/manycore technologies, 2008

Coordinating System Software for Power Savings.
Proceedings of the Second International Conference on Future Generation Communication and Networking, 2008

2007
The Design and Implementation of the DVS Based Dynamic Compiler for Power Reduction.
Proceedings of the Advanced Parallel Processing Technologies, 7th International Symposium, 2007


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