Lionel Bening

According to our database, Lionel Bening authored at least 6 papers between 1979 and 2001.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2001

Optimizing Multiple EDA Tools within the ASIC Design Flow.

Lionel Bening, Harry Foster

IEEE Des. Test Comput., 2001

Principles of verifiable RTL design - a functional coding style supporting verification processes in Verilog.

Lionel Bening, Harry Foster

Kluwer, ISBN: 978-0-7923-7368-1, 2001

1999

A Two-State Methodology for RTL Logic Simulation.

Lionel Bening

Proceedings of the 36th Conference on Design Automation, 1999

1989

Critical path issue in VLSI design.

Habib Youssef, Eugene Shragowitz, Lionel Bening

Proceedings of the 1989 IEEE International Conference on Computer-Aided Design, 1989

1982

Developments in logic network path delay analysis.

Lionel Bening, Thomas A. Lane, Curtis R. Alexander, James E. Smith

Proceedings of the 19th Design Automation Conference, 1982

1979

Developments in computer simulation of gate level physical logic.

Lionel Bening

Proceedings of the 16th Design Automation Conference, 1979