Long-Yi Lin

According to our database1, Long-Yi Lin authored at least 7 papers between 2012 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2019
Design of a 0.20-0.25-V, Sub-nW, Rail-to-Rail, 10-bit SAR ADC for Self-Sustainable IoT Applications.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

Accurate and Fast On-Wafer Test Circuitry for Device Array Characterization in Wafer Acceptance Test.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

2017
An Enhanced Boundary Scan Architecture for Inter-Die Interconnect Leakage Measurement in 2.5D and 3D Packages.
Proceedings of the 26th IEEE Asian Test Symposium, 2017

2016
A Study on the Transfer Function Based Analog Fault Model for Linear and Time-Invariant Continuous-Time Analog Circuits.
Proceedings of the 25th IEEE Asian Test Symposium, 2016

2014
A Cost-Effective Stimulus Generator for Battery Channel Characterization in Electric Vehicles.
Proceedings of the 23rd IEEE Asian Test Symposium, 2014

2013
Design of a Fault-Injectable Fleischer-Laker Switched-Capacitor Biquad for Verifying the Static Linear Behavior Fault Model.
Proceedings of the 22nd Asian Test Symposium, 2013

2012
Testing the Fleischer-Laker switched-capacitor biquad using the diagnosis-after-test procedure.
Proceedings of the International SoC Design Conference, 2012


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