Ludovic Moreau

According to our database, Ludovic Moreau authored at least 9 papers between 2011 and 2021.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2021

SleepRunner: A 28-nm FDSOI ULP Cortex-M0 MCU With ULL SRAM and UFBR PVT Compensation for 2.6-3.6-μW/DMIPS 40-80-MHz Active Mode and 131-nW/kB Fully Retentive Deep-Sleep Mode.

David Bol, Maxime Schramme, Ludovic Moreau, Pengcheng Xu, Rémi Dekimpe, Roghayeh Saeidi, Thomas Haine, Charlotte Frenkel, Denis Flandre

IEEE J. Solid State Circuits, 2021

SleepRider: a 5.5μW/MHz Cortex-M4 MCU in 28nm FD-SOI with ULP SRAM, Biomedical AFE and Fully-Integrated Power, Clock and Back-Bias Management.

Rémi Dekimpe, Maxime Schramme, Martin Lefebvre, Adrian Kneip, Roghayeh Saeidi, Mathieu Xhonneux, Ludovic Moreau, Marco Gonzalez, Thibault Pirson, David Bol

Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021

A 0.2-to-3.6TOPS/W Programmable Convolutional Imager SoC with In-Sensor Current-Domain Ternary-Weighted MAC Operations for Feature Extraction and Region-of-Interest Detection.

Martin Lefebvre, Ludovic Moreau, Rémi Dekimpe, David Bol

Proceedings of the IEEE International Solid-State Circuits Conference, 2021

2019

A 40-to-80MHz Sub-4μW/MHz ULV Cortex-M0 MCU SoC in 28nm FDSOI With Dual-Loop Adaptive Back-Bias Generator for 20μs Wake-Up From Deep Fully Retentive Sleep Mode.

David Bol, Maxime Schramme, Ludovic Moreau, Thomas Haine, Pengcheng Xu, Charlotte Frenkel, Remi Dekimpe, François Stas, Denis Flandre

Proceedings of the IEEE International Solid- State Circuits Conference, 2019

A 0.4V 0.5fJ/cycle TSPC Flip-Flop in 65nm LP CMOS with Retention Mode Controlled by Clock-Gating Cells.

Ludovic Moreau, Rémi Dekimpe, David Bol

Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

2018

On a Class of Path-Dependent Singular Stochastic Control Problems.

Romuald Elie, Ludovic Moreau, Dylan Possamaï

SIAM J. Control. Optim., 2018

2017

An 80-MHz 0.4V ULV SRAM macro in 28nm FDSOI achieving 28-fJ/bit access energy with a ULP bitcell and on-chip adaptive back bias generation.

Thomas Haine, Quoc-Khoi Nguyen, François Stas, Ludovic Moreau, Denis Flandre, David Bol

Proceedings of the 43rd IEEE European Solid State Circuits Conference, 2017

2016

Hedging Under an Expected Loss Constraint with Small Transaction Costs.

Bruno Bouchard, Ludovic Moreau, H. Mete Soner

SIAM J. Financial Math., 2016

2011

Stochastic Target Problems with Controlled Loss in Jump Diffusion Models.

Ludovic Moreau

SIAM J. Control. Optim., 2011