Luis C. Aparicio

Orcid: 0000-0002-8859-0839

According to our database1, Luis C. Aparicio authored at least 8 papers between 2008 and 2020.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2020
A Random Matrix Theory Approach to Denoise Single-Cell Data.
Patterns, 2020

2015
ACDC: Small, Predictable and High-Performance Data Cache.
ACM Trans. Embed. Comput. Syst., 2015

A predictable hardware to exploit temporal reuse in real-time and embedded systems.
J. Syst. Archit., 2015

2013
Optimizing a combined WCET-WCEC problem in instruction fetching for real-time systems.
J. Syst. Archit., 2013

2012
A Small and Effective Data Cache for Real-Time Multitasking Systems.
Proceedings of the 2012 IEEE 18th Real Time and Embedded Technology and Applications Symposium, 2012

2011
Improving the WCET computation in the presence of a lockable instruction cache in multitasking real-time systems.
J. Syst. Archit., 2011

2010
Combining Prefetch with Instruction Cache Locking in Multitasking Real-Time Systems.
Proceedings of the 16th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 2010

2008
Avoiding the WCET Overestimation on LRU Instruction Cache.
Proceedings of the Fourteenth IEEE Internationl Conference on Embedded and Real-Time Computing Systems and Applications, 2008


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