Luis Costero

Orcid: 0000-0002-6922-2520

According to our database1, Luis Costero authored at least 16 papers between 2015 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

Online presence:

On csauthors.net:

Bibliography

2024
Acceleration and energy consumption optimization in cascading classifiers for face detection on low-cost ARM big.LITTLE asymmetric architectures.
CoRR, 2024

2023
Dynamic power budget redistribution under a power cap on multi-application environments.
Sustain. Comput. Informatics Syst., April, 2023

CloudProphet: A Machine Learning-Based Performance Prediction for Public Clouds.
CoRR, 2023

Improving inference time in multi-TPU systems with profiled model segmentation.
Proceedings of the 31st Euromicro International Conference on Parallel, 2023

2022
Reinforcement Learning-Based Joint Reliability and Performance Optimization for Hybrid-Cache Computing Servers.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Applying Game-Learning Environments to Power Capping Scenarios via Reinforcement Learning.
Proceedings of the Cloud Computing, Big Data & Emerging Topics - 10th Conference, 2022

2020
Resource Management for Power-Constrained HEVC Transcoding Using Reinforcement Learning.
IEEE Trans. Parallel Distributed Syst., 2020

Leveraging knowledge-as-a-service (KaaS) for QoS-aware resource management in multi-user video transcoding.
J. Supercomput., 2020

2019
MAMUT: Multi-Agent Reinforcement Learning for Efficient Real-Time Multi-User Video Transcoding.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

2018
Acceleration and energy consumption optimization in cascading classifiers for face detection on low-cost ARM big. LITTLE asymmetric architectures.
Int. J. Circuit Theory Appl., 2018

2017
Revisiting conventional task schedulers to exploit asymmetry in multi-core architectures for dense linear algebra operations.
Parallel Comput., 2017

An approach to automated videogame beta testing.
Entertain. Comput., 2017

Energy Efficiency Optimization of Task-Parallel Codes on Asymmetric Architectures.
Proceedings of the 2017 International Conference on High Performance Computing & Simulation, 2017

2016
Refactoring Conventional Task Schedulers to Exploit Asymmetric ARM big.LITTLE Architectures in Dense Linear Algebra.
Proceedings of the 2016 IEEE International Parallel and Distributed Processing Symposium Workshops, 2016

2015
Revisiting Conventional Task Schedulers to Exploit Asymmetry in ARM big.LITTLE Architectures for Dense Linear Algebra.
CoRR, 2015

Automatic Gameplay Testing for Message Passing Architectures.
Proceedings of the Proceedings 2st Congreso de la Sociedad Española para las Ciencias del Videojuego, 2015


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