Maher Fakih

According to our database, Maher Fakih authored at least 22 papers between 2013 and 2021.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of four.

2021

A modeling methodology for collaborative evaluation of future automotive innovations.

Maher Fakih, Oliver Klemp, Stefan Puch, Kim Grüttner

Softw. Syst. Model., 2021

2020

Functional test environment for time-triggered control systems in complex MPSoCs.

Razi Seyyedi, Sören Schreiner, Maher Fakih, Kim Grüttner, Wolfgang Nebel

Microprocess. Microsystems, 2020

Capturing Neural-Networks as Synchronous Dataflow Graphs.

Daniel Luenemann, Maher Fakih, Kim Grüttner

Proceedings of the 23rd GMM/ITG/GI Workshop on Methods and Description Languages for Modelling and Verification of Circuits and Systems, 2020

2019

Probabilistic State-Based RT-Analysis of SDFGs on MPSoCs with Shared Memory Communication.

Ralf Stemmer, Henning Schlender, Maher Fakih, Kim Grüttner, Wolfgang Nebel

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

Experimental Evaluation of Scenario Aware Synchronous Data Flow based Power Management.

Oliver Klemp, Maher Fakih, Kim Grüttner, Ralf Stemmer, Wolfgang Nebel

Proceedings of the International Conference on Omni-Layer Intelligent Systems, 2019

SAFEPOWER: Application of Power Management Techniques in SoCs for Safety-Relevant Systems.

Kim Grüttner, Maher Fakih, Mikel Azkarate-askatsua, Peio Onaindia, Roman Obermaisser

Proceedings of the International Conference on Omni-Layer Intelligent Systems, 2019

A Design-flow for implementing, validating and evaluating Machine-learning Classifiers on FPGAs.

Jan Cordes, Maher Fakih

Proceedings of the International Conference on Omni-Layer Intelligent Systems, 2019

2018

Towards power management verification of time-triggered systems using virtual platforms.

Sören Schreiner, Razi Seyyedi, Maher Fakih, Kim Grüttner, Wolfgang Nebel

Proceedings of the 18th International Conference on Embedded Computer Systems: Architectures, 2018

Functional Test Environment for Time-Triggered Control Systems in Complex MPSoCs Using GALI.

Razi Seyyedi, Sören Schreiner, Maher Fakih, Kim Grüttner, Wolfgang Nebel

Proceedings of the 21st Euromicro Conference on Digital System Design, 2018

A Hypervisor Architecture for Low-Power Real-Time Embedded Systems.

Tomaso Poggi, Peio Onaindia, Mikel Azkarate-askatsua, Kim Grüttner, Maher Fakih, Salvador Peiro Frasquet, Patricia Balbastre

Proceedings of the 21st Euromicro Conference on Digital System Design, 2018

2017

SAFEPOWER project: Architecture for safe and power-efficient mixed-criticality systems.

Maher Fakih, Alina Lenz, Mikel Azkarate-askasua, Javier Coronel, Alfons Crespo, Simon Davidmann, Juan Carlos Diaz Garcia, Nera González Romero, Kim Grüttner, Sören Schreiner, Razi Seyyedi, Roman Obermaisser, Adele Maleki, Johnny Öberg, Mohamed Tagelsir Mohammadat, Jon Pérez-Cerrolaza, Ingo Sander, Ingemar Söderquist

Microprocess. Microsystems, 2017

Power and Execution Time Measurement Methodology for SDF Applications on FPGA-based MPSoCs.

Christof Schlaak, Maher Fakih, Ralf Stemmer

CoRR, 2017

Automatic SDF-based Code Generation from Simulink Models for Embedded Software Development.

Maher Fakih, Sebastian Warsitz

CoRR, 2017

Towards virtual prototyping of synchronous real-time systems on noc-based MPSoCs.

Razi Seyyedi, Mohamed Tagelsir Mohammadat, Maher Fakih, Kim Grüttner, Johnny Öberg, Duncan Graham

Proceedings of the 12th IEEE International Symposium on Industrial Embedded Systems, 2017

Towards State-Based RT Analysis of FSM-SADFGs on MPSoCs with Shared Memory Communication.

Ralf Stemmer, Maher Fakih, Kim Grüttner, Wolfgang Nebel

Proceedings of the 9th Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools, 2017

Towards Timing and Power Analysis of FSM-SADFGs on MPSoCs with Shared Memory Communication.

Ralf Stemmer, Maher Fakih

Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, 2017

A Functional Test Framework to Observe MPSoC Power Management Techniques in Virtual Platforms.

Sören Schreiner, Maher Fakih, Kim Grüttner, Duncan Graham, Wolfgang Nebel, Salvador Peiro Frasquet

Proceedings of the Euromicro Conference on Digital System Design, 2017

2016

State-Based Real-Time Analysis of Synchronous Data-flow (SDF) Applications on MPSoCs with Shared Communication Resources.

Maher Fakih

PhD thesis, 2016

Simulink-Modell-Übersetzung in synchrone Datenflussgraphen.

Sebastian Warsitz, Maher Fakih

Proceedings of the 19th GI/ITG/GMM Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, 2016

2015

State-based real-time analysis of SDF applications on MPSoCs with shared communication resources.

Maher Fakih, Kim Grüttner, Martin Fränzle, Achim Rettberg

J. Syst. Archit., 2015

2013

Exploiting Segregation in Bus-Based MPSoCs to Improve Scalability of Model-Checking-Based Performance Analysis for SDFAs.

Maher Fakih, Kim Grüttner, Martin Fränzle, Achim Rettberg

Proceedings of the Embedded Systems: Design, Analysis and Verification, 2013

Towards performance analysis of SDFGs mapped to shared-bus architectures using model-checking.

Maher Fakih, Kim Grüttner, Martin Fränzle, Achim Rettberg

Proceedings of the Design, Automation and Test in Europe, 2013