Ingo Sander

According to our database1, Ingo Sander authored at least 71 papers between 1999 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Bibliography

2019
Modeling and Simulation of Dynamic Applications Using Scenario-Aware Dataflow.
ACM Trans. Design Autom. Electr. Syst., 2019

Formal Design, Co-Simulation and Validation of a Radar Signal Processing System.
Proceedings of the 2019 Forum for Specification and Design Languages, 2019

2018
Flexible and Tradeoff-Aware Constraint-Based Design Space Exploration for Streaming Applications on Heterogeneous Platforms.
ACM Trans. Design Autom. Electr. Syst., 2018

Exploring Power and Throughput for Dataflow Applications on Predictable NoC Multiprocessors.
Proceedings of the 21st Euromicro Conference on Digital System Design, 2018

Bridging discrete and continuous time models with atoms.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

An algebra for modeling continuous time systems.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017
ForSyDe: System Design Using a Functional Language and Models of Computation.
Proceedings of the Handbook of Hardware/Software Codesign., 2017

Designing end-to-end resource reservations in predictable distributed embedded systems.
Real-Time Systems, 2017

CONTREX: Design of embedded mixed-criticality CONTRol systems under consideration of EXtra-functional properties.
Microprocessors and Microsystems - Embedded Hardware Design, 2017

SAFEPOWER project: Architecture for safe and power-efficient mixed-criticality systems.
Microprocessors and Microsystems - Embedded Hardware Design, 2017

Throughput Propagation in Constraint-Based Design Space Exploration for Mixed-Criticality Systems.
Proceedings of the 9th Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools, 2017

A layered formal framework for modeling of cyber-physical systems.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

Automatic construction of models for analytic system-level design space exploration problems.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

2016
An extensible modeling methodology for embedded and cyber-physical system design.
Simulation, 2016

A modular design space exploration framework for multiprocessor real-time systems.
Proceedings of the 2016 Forum on Specification and Design Languages, 2016

SAFEPOWER Project: Architecture for Safe and Power-Efficient Mixed-Criticality Systems.
Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016

CONTREX: Design of Embedded Mixed-Criticality CONTRol Systems under Consideration of EXtra-Functional Properties.
Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016

2015
A formal, model-driven design flow for system simulation and multi-core implementation.
Proceedings of the 10th IEEE International Symposium on Industrial Embedded Systems, 2015

Towards cognitive reconfigurable hardware: Self-aware learning in RTR fault-tolerant SoCs.
Proceedings of the 10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2015

An efficient joint analytical and simulation-based design space exploration flow for predictable multi-core systems.
Proceedings of the 2015 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools, 2015

Customization of OpenCL applications for efficient task mapping under heterogeneous platform constraints.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

2014
On providing scalable self-healing adaptive fault-tolerance to RTR SoCs.
Proceedings of the 2014 International Conference on ReConFigurable Computing and FPGAs, 2014

An extensible infrastructure for modeling and time analysis of predictable embedded systems.
Proceedings of the 2014 Forum on Specification and Design Languages, 2014

Synthesizing code for GPGPUs from abstract formal models.
Proceedings of the 2014 Forum on Specification and Design Languages, 2014

A constraint-based design space exploration framework for real-time applications on MPSoCs.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

The upset-fault-observer: A concept for self-healing adaptive fault tolerance.
Proceedings of the 2014 NASA/ESA Conference on Adaptive Hardware and Systems, 2014

2013
Towards the generic reconfigurable accelerator: Algorithm development, core design, and performance analysis.
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2013

Rapid virtual prototyping of real-time systems using predictable platform characterizations.
Proceedings of the 2013 Forum on specification and Design Languages, 2013

Combining analytical and simulation-based design space exploration for time-critical systems.
Proceedings of the 2013 Forum on specification and Design Languages, 2013

Towards a Modelling and Design Framework for Mixed-Criticality SoCs and Systems-of-Systems.
Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013

An automated parallel simulation flow for heterogeneous embedded systems.
Proceedings of the Design, Automation and Test in Europe, 2013

The RecoBlock SoC platform: a flexible array of reusable run-time-reconfigurable IP-blocks.
Proceedings of the Design, Automation and Test in Europe, 2013

System level synthesis of hardware for DSP applications using pre-characterized function implementations.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2013

2012
Performance Analysis of Reconfigurations in Adaptive Real-Time Streaming Applications.
ACM Trans. Embedded Comput. Syst., 2012

Heterogeneous system-level modeling for small and medium enterprises.
Proceedings of the 25th Symposium on Integrated Circuits and Systems Design, 2012

Formal heterogeneous system modeling with SystemC.
Proceedings of the Proceeding of the 2012 Forum on Specification and Design Languages, 2012

Integrating virtual platforms into a heterogeneous MoC-based modeling framework.
Proceedings of the Proceeding of the 2012 Forum on Specification and Design Languages, 2012

2011
Co-simulation of embedded systems in a heterogeneous MoC-based modeling framework.
Proceedings of the Industrial Embedded Systems (SIES), 2011

Semi-formal refinement of heterogeneous embedded systems by foreign model integration.
Proceedings of the 2011 Forum on Specification & Design Languages, 2011

Predicting bus contention effects on energy and performance in multi-processor SoCs.
Proceedings of the Design, Automation and Test in Europe, 2011

2010
Inferring Energy and Performance Cost of RTOS in Priority-Driven Scheduling.
Proceedings of the IEEE Fifth International Symposium on Industrial Embedded Systems, 2010

HetMoC: Heterogeneous Modelling in SystemC.
Proceedings of the 2010 Forum on specification & Design Languages, 2010

Pareto efficient design for reconfigurable streaming applications on CPU/FPGAs.
Proceedings of the Design, Automation and Test in Europe, 2010

Predicting energy and performance overhead of Real-Time Operating Systems.
Proceedings of the Design, Automation and Test in Europe, 2010

Constrained global scheduling of streaming applications on MPSoCs.
Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010

2009
High-level estimation and trade-off analysis for adaptive real-time systems.
Proceedings of the 23rd IEEE International Symposium on Parallel and Distributed Processing, 2009

Buffer minimization of real-time streaming applications scheduling on hybrid CPU/FPGA architectures.
Proceedings of the Design, Automation and Test in Europe, 2009

2008
Application and Verification of Local Nonsemantic-Preserving Transformations in System Design.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2008

Modelling Adaptive Systems in ForSyDe.
Electr. Notes Theor. Comput. Sci., 2008

Performance analysis of reconfiguration in adaptive real-time streaming applications.
Proceedings of the 6th IEEE/ACM/IFIP Workshop on Embedded Systems for Real-Time Multimedia, 2008

Energy efficient streaming applications with guaranteed throughput on MPSoCs.
Proceedings of the 8th ACM & IEEE International conference on Embedded software, 2008

2007
Using Synchronizers for Refining Synchronous Communication onto Hardware/Software Architectures.
Proceedings of the 18th IEEE International Workshop on Rapid System Prototyping (RSP 2007), 2007

A synchronization algorithm for local temporal refinements in perfectly synchronous models with nested feedback loops.
Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, 2007

The ANDRES Project: Analysis and Design of Run-Time Reconfigurable, Heterogeneous Systems.
Proceedings of the FPL 2007, 2007

Synchronization after design refinements with sensitive delay elements.
Proceedings of the 5th International Conference on Hardware/Software Codesign and System Synthesis, 2007

2006
Flexible Bus and NoC Performance Analysis with Configurable Synthetic Workloads.
Proceedings of the Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August, 2006

Towards Performance-Oriented Pattern-Based Refinement of Synchronous Models onto NoC Communication.
Proceedings of the Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August, 2006

2005
System level verification of digital signal processing applications based on the polynomial abstraction technique.
Proceedings of the 2005 International Conference on Computer-Aided Design, 2005

Refinement of Perfectly Synchronous Communication Model.
Proceedings of the Forum on specification and Design Languages, 2005

Feasibility analysis of messages for on-chip networks using wormhole routing.
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

2004
System modeling and transformational design refinement in ForSyDe [formal system design].
IEEE Trans. on CAD of Integrated Circuits and Systems, 2004

Polynomial Abstraction for Verification of Sequentially Implemented Combinational Circuits.
Proceedings of the 2004 Design, 2004

2003
System Modeling and Design Refinement in ForSyDe.
PhD thesis, 2003

Development and Application of Design Transformations in ForSyDe.
Proceedings of the 2003 Design, 2003

Verification of design decisions in ForSyDe.
Proceedings of the 1st IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2003

2002
A Case Study of Hardware and Software Synthesis in ForSyDe.
Proceedings of the 15th International Symposium on System Synthesis (ISSS 2002), 2002

Transformation based communication and clock domain refinement for system design.
Proceedings of the 39th Design Automation Conference, 2002

2001
The usage of stochastic processes in embedded system specifications.
Proceedings of the Ninth International Symposium on Hardware/Software Codesign, 2001

2000
On the roles of functions and objects in system specification.
Proceedings of the Eighth International Workshop on Hardware/Software Codesign, 2000

1999
Formal System Design Based on the Synchrony Hypothesis, Functional Models and Skeletons.
Proceedings of the 12th International Conference on VLSI Design (VLSI Design 1999), 1999

System synthesis utilizing a layered functional model.
Proceedings of the Seventh International Workshop on Hardware/Software Codesign, 1999


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