Mahreen Khan
Orcid: 0009-0004-6276-1961
According to our database1,
Mahreen Khan authored at least 10 papers
between 2025 and 2026.
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Bibliography
2026
IEEE Access, 2026
Microarchitectural Espionage: FPGA-Based Security Analysis of Branch Prediction in RISC-V Out-of-Order Cores.
Proceedings of the 2026 14th International Symposium on Digital Forensics and Security (ISDFS), 2026
NeuroSnitch: Exploiting Inter-Spike Interval Statistics for Timing Side-Channel Attacks on Noisy Neuromorphic Systems.
Proceedings of the 2026 ACM Southeast Conference, 2026
2025
Assessing Security RISC: Analyzing Flush+Fault Attack on RISC-V Using gem5 Simulator.
Proceedings of the 22nd International Conference on Security and Cryptography, 2025
Side-Channel Attack Detection Using gem5 and Machine Learning: A Case Study on Fault-Based Attacks in RISC-V.
Proceedings of the 31st IEEE International Symposium on On-Line Testing and Robust System Design, 2025
Evaluating KASLR Break on RISC-V Using Gem5: Microarchitectural Side-Channel Analysis of Page-Table Walks.
Proceedings of the Cybersecurity - 9th European Interdisciplinary Cybersecurity Conference, 2025
Evict+Spec+Time on RISC-V: Gem5-Based Implementation and Microarchitectural Analysis.
Proceedings of the 28th Euromicro Conference on Digital System Design, 2025
Proceedings of the IEEE International Conference on Cyber Security and Resilience, 2025
Proceedings of the 2025 Computing, 2025
Proceedings of the 2025 Computing, 2025