Florent Bruguier

Orcid: 0000-0002-7897-5700

According to our database1, Florent Bruguier authored at least 30 papers between 2010 and 2024.

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Bibliography

2024
Reducing the Silicon Area Overhead of Counter-Based Rowhammer Mitigations.
IEEE Comput. Archit. Lett., 2024

2022
Correlation Electromagnetic Analysis on an FPGA Implementation of CRYSTALS-Kyber.
IACR Cryptol. ePrint Arch., 2022

2021
Implementing Rowhammer Memory Corruption in the gem5 Simulator.
Proceedings of the IEEE International Workshop on Rapid System Prototyping, 2021

Virtual Platform to Analyze the Security of a System on Chip at Microarchitectural Level.
Proceedings of the IEEE European Symposium on Security and Privacy Workshops, 2021

Transit-Guard: An OS-based Defense Mechanism Against Transient Execution Attacks.
Proceedings of the 26th IEEE European Test Symposium, 2021

Diminisher: A Linux Kernel Based Countermeasure for TAA Vulnerability.
Proceedings of the Computer Security. ESORICS 2021 International Workshops, 2021

Vulnerability Assessment of the Rowhammer Attack Using Machine Learning and the gem5 Simulator - Work in Progress.
Proceedings of the SAT-CPS@CODASPY 2021, 2021

2020
Wallance, an Alternative to Blockchain for IoT.
Proceedings of the 6th IEEE World Forum on Internet of Things, 2020

Teaching Hardware Security: Earnings of an Introduction Proposed as an Escape Game.
Proceedings of the Cross Reality and Data Science in Engineering, 2020

2019
A gem5 trace-driven simulator for fast architecture exploration of OpenMP workloads.
Microprocess. Microsystems, 2019

Exploration of Performance and Energy Trade-offs for Heterogeneous Multicore Architectures.
CoRR, 2019

Evaluation of SPN-Based Lightweight Crypto-Ciphers.
IEEE Access, 2019

Automatic Energy-Efficiency Monitoring of OpenMP Workloads.
Proceedings of the 14th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2019

Edge-Computing Perspectives with Reconfigurable Hardware.
Proceedings of the 14th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2019

2018
Evaluation of Heterogeneous Multicore Cluster Architectures Designed for Mobile Computing.
Proceedings of the 13th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2018

Improving the Performance of STT-MRAM LLC Through Enhanced Cache Replacement Policy.
Proceedings of the Architecture of Computing Systems - ARCS 2018, 2018

2017
ElasticSimMATE: A fast and accurate gem5 trace-driven simulator for multicore systems.
Proceedings of the 12th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2017

2016
Cost-Effective Design Strategies for Securing Embedded Processors.
IEEE Trans. Emerg. Top. Comput., 2016

Loop optimization in presence of STT-MRAM caches: A study of performance-energy tradeoffs.
Proceedings of the 26th International Workshop on Power and Timing Modeling, 2016

Full-System Simulation of big.LITTLE Multicore Architecture for Performance and Energy Exploration.
Proceedings of the 10th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2016

Hardware security: From concept to application.
Proceedings of the 11th European Workshop on Microelectronics Education, 2016

2014
Voltage scaling and aging effects on soft error rate in SRAM-based FPGAs.
Microelectron. Reliab., 2014

Method for dynamic power monitoring on FPGAs.
Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014

Aging effects in FPGAs: an experimental analysis.
Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014

Aging and voltage scaling impacts under neutron-induced soft error rate in SRAM-based FPGAs.
Proceedings of the 19th IEEE European Test Symposium, 2014

2013
Using electromagnetic emanations for variability characterization in Flash-based FPGAs.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2013

2011
PI and PID Regulation Approaches for Performance-Constrained Adaptive Multiprocessor System-on-Chip.
IEEE Embed. Syst. Lett., 2011

Open-Scale: A Scalable, Open-Source NOC-based MPSoC for Design Space Exploration.
Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs, 2011

A New Process Characterization Method for FPGAs Based on Electromagnetic Analysis.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2011

2010
Investigation of Digital Sensors for Variability Characterization on FPGAs.
Proceedings of the 5th International Workshop on Reconfigurable Communication-centric Systems on Chip, 2010


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