Maoqiang Liu

Orcid: 0000-0002-0603-7934

According to our database1, Maoqiang Liu authored at least 8 papers between 2015 and 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2019
A 10-b 20-MS/s SAR ADC With DAC-Compensated Discrete-Time Reference Driver.
IEEE J. Solid State Circuits, 2019

2017
A 7.1-fJ/Conversion-Step 88-dB SFDR SAR ADC With Energy-Free "Swap To Reset".
IEEE J. Solid State Circuits, 2017

A 0.9V-VDD sub-nW resistor-less duty-cycled CMOS voltage reference in 65nm for IoT.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

A 10b 20MS/s SAR ADC with a low-power and area-efficient DAC-compensated reference.
Proceedings of the 43rd IEEE European Solid State Circuits Conference, 2017

2016
A106nW 10 b 80 kS/s SAR ADC With Duty-Cycled Reference Generation in 65 nm CMOS.
IEEE J. Solid State Circuits, 2016

A 7.1fJ/conv.-step 88dB-SFDR 12b SAR ADC with energy-efficient swap-to-reset.
Proceedings of the ESSCIRC Conference 2016: 42<sup>nd</sup> European Solid-State Circuits Conference, 2016

2015
15.4 A 0.8V 10b 80kS/s SAR ADC with duty-cycled reference generation.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

Human body channel energy harvesting scheme with -22.5 dBm sensitivity 25.87% efficiency threshold-compensated rectifier.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015


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