Huailin Liao
Orcid: 0000-0003-3221-8146
According to our database1,
Huailin Liao
authored at least 47 papers
between 2009 and 2023.
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Bibliography
2023
A 2.85-mm<sup>2</sup> Wideband RF Transceiver in 40-nm CMOS for IoT Micro-Hub Applications.
IEEE Trans. Circuits Syst. I Regul. Pap., October, 2023
An All-Digital Outphasing Transmitter IC for Ka-Band Bit-to-RF Concurrent Multi-Beam DBF Array.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
A Single-Ended Digital Transmitter Based on I/Q-Sharing Switched-Capacitor Power Amplifier and Third-Order Harmonic-Rejection.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
2022
A 24 GHz Self-Calibrated All-Digital FMCW Synthesizer With 0.01% RMS Frequency Error Under 3.2 GHz Chirp Bandwidth and 320 MHz/µs Chirp Slope.
IEEE J. Solid State Circuits, 2022
2021
32.5 A 24GHz Self-Calibrated ADPLL-Based FMCW Synthesizer with 0.01% rms Frequency Error Under 3.2GHz Chirp Bandwidth and 320MHz/μs Slope.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021
A Hybrid Digital Transmitter Architecture for High- Efficiency and High-Speed Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
A Gm-Compensated 46-101 GHz Broadband Power Amplifier for High-Resolution FMCW Radars.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2021
2020
A 12-GHz Calibration-Free All-Digital PLL for FMCW Signal Generation With 78 MHz/μs Chirp Slope and High Chirp Linearity.
IEEE Trans. Circuits Syst., 2020
A 0.5-V 3.69-nW Complementary Source-Follower-C Based Low-Pass Filter for Wearable Biomedical Applications.
IEEE Trans. Circuits Syst., 2020
An 81-99 GHz Tripler with Fundamental Cancellation and 3rd Harmonic Enhancement Technique in 40-nm CMOS.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
2019
A 2.9 GHz Variable Inductor-Based DCO With 1.3 kHz Frequency Resolution for FMCW Radar Applications.
IEEE Trans. Circuits Syst. II Express Briefs, 2019
A 28 GHz 8-Bit Calibration-Free LO-Path Phase Shifter using Transformer-Based Vector Summing Topology in 40 nm CMOS.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
A Calibration-Free Fractional-N ADPLL using Retiming Architecture and a 9-bit 0.3ps-INL Phase Interpolator.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
A 12-GHz All-Digital Calibration-Free FMCW Signal Generator Based on a Retiming Fractional Frequency Divider.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2019
2018
A 2.4-mW interference-resilient receiver front end with series N-path filter-based balun for body channel communication.
Int. J. Circuit Theory Appl., 2018
A Digital Phase Noise Cancelling Scheme for Ring Oscillator-based Fractional-N ADPLL.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
A 12-bit 2.5 GHz 0.37ps-Peak-INL Digital-to-Time Converter with Parasitic-Insensitive Charge-Based Phase Interpolator.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
A 43.2 μW 2.4 GHz 64-QAM Pseudo-Backscatter Modulator Based on Integrated Directional Coupler.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
2017
IEICE Electron. Express, 2017
A single-poly EEPROM with low leakage charge pump and peripheral circuits for passive RFID tag in a standard CMOS technology.
IEICE Electron. Express, 2017
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
2016
A 51-nW 32.7-kHz CMOS relaxation oscillator with half-period pre-charge compensation scheme for ultra-low power systems.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
A 93.7% peak efficiency DC-DC buck converter with all-pass network based passive level shifter in 55 nm CMOS.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
A low-power calibration-free fractional-N digital PLL with high linear phase interpolator.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2016
2015
Highly Reconfigurable Analog Baseband for Multistandard Wireless Receivers in 65-nm CMOS.
IEEE Trans. Circuits Syst. II Express Briefs, 2015
A high frequency resolution digitally controlled oscillator with differential tapped inductor.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
Human body channel energy harvesting scheme with -22.5 dBm sensitivity 25.87% efficiency threshold-compensated rectifier.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
2014
IEEE Trans. Circuits Syst. I Regul. Pap., 2014
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
A SAW-less 0.5-2.5 GHz receiver front-end with 80 dB 3<sup>rd</sup> order harmonic rejection ratio.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
2013
Highly Power-Efficient Active-RC Filters With Wide Bandwidth-Range Using Low-Gain Push-Pull Opamps.
IEEE Trans. Circuits Syst. I Regul. Pap., 2013
Sci. China Inf. Sci., 2013
SAW-less GNSS front-end amplifier with 80.4-dB GSM blocker suppression using CMOS directional coupler notch filter.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
2012
Widely reconfigurable 8<sup>th</sup>-order chebyshev analog baseband IC with proposed push-pull op-amp for Software-Defined Radio in 65nm CMOS.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
A +21.2 dBm out-of-band IIP3 0.2-3GHz RF front-end using impedance translation technique.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
2011
A 0.47mW 6<sup>th</sup>-order 20MHz active filter using highly power-efficient Opamp.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
-99dBc/Hz@10kHz 1MHz-step dual-loop integer-N PLL with anti-mislocking frequency calibration for global navigation satellite system receiver.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
Proceedings of the 37th European Solid-State Circuits Conference, 2011
Characterization and analysis of gate-all-around Si nanowire transistors for extreme scaling.
Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011
2010
IEEE J. Solid State Circuits, 2010
2009
Proceedings of the 35th European Solid-State Circuits Conference, 2009