Marcial Jesús Rodríguez-Irago

According to our database1, Marcial Jesús Rodríguez-Irago authored at least 5 papers between 2005 and 2008.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2008
Signal Integrity Enhancement in Digital Circuits.
IEEE Des. Test Comput., 2008

2006
Using Multiple Clock Schemes and Multi-Temperature Test for Dynamic Fault Detection in Digital Systems.
Proceedings of the 7th Latin American Test Workshop, 2006

Dynamic Fault Detection in Digital Systems Using Dynamic Voltage Scaling and Multi-Temperature Schemes.
Proceedings of the 12th IEEE International On-Line Testing Symposium (IOLTS 2006), 2006

2005
Fault Modeling and Simulation of Power Supply Voltage Transients in Digital Systems on a Chip.
J. Electron. Test., 2005

Dynamic Fault Test and Diagnosis in Digital Systems Using Multiple Clock Schemes and Multi-VDD Test.
Proceedings of the 11th IEEE International On-Line Testing Symposium (IOLTS 2005), 2005


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