Marco Poles

According to our database, Marco Poles authored at least 4 papers between 2003 and 2005.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2005

How Circuit Analysis and Yield Optimization Can Be Used To Detect Circuit Limitations Before Silicon Results.

Carlo Roma, Pierluigi Daglio, Guido De Sandre, Marco Pasotti, Marco Poles

Proceedings of the 6th International Symposium on Quality of Electronic Design (ISQED 2005), 2005

A 1 V, 26 μW extended temperature range band-gap reference in 130-nm CMOS technology.

Alessandro Cabrini, Guido De Sandre, Laura Gobbi, Piero Malcovati, Marco Pasotti, Marco Poles, F. Rigoni, Guido Torelli

Proceedings of the 31st European Solid-State Circuits Conference, 2005

2003

A high compliance CMOS current source for low voltage applications.

Michele Quarantelli, Marco Poles, Marco Pasotti, Pier Luigi Rolandi

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

A reconfigurable signal processing IC with embedded FPGA and multi-port flash memory.

Michele Borgatti, Lorenzo Cali, Guido De Sandre, Benoit Forêt, David Iezzi, Francesco Lertora, Gilberto Muzzi, Marco Pasotti, Marco Poles, Pier Luigi Rolandi

Proceedings of the 40th Design Automation Conference, 2003