Guido De Sandre
According to our database1,
Guido De Sandre
authored at least 10 papers
between 2003 and 2011.
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Bibliography
2011
A 4 Mb LV MOS-Selected Embedded Phase Change Memory in 90 nm Standard CMOS Technology.
IEEE J. Solid State Circuits, 2011
2010
A 90nm 4Mb embedded phase-change memory with 1.2V 12ns read access time and 1MB/s write throughput.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010
2008
Program circuit for a phase change memory array with 2 MB/s write throughput for embedded applications.
Proceedings of the ESSCIRC 2008, 2008
2007
Dynamical Analysis of Full-Range Cellular Neural Networks by Exploiting Differential Variational Inequalities.
IEEE Trans. Circuits Syst. I Regul. Pap., 2007
2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
2005
How Circuit Analysis and Yield Optimization Can Be Used To Detect Circuit Limitations Before Silicon Results.
Proceedings of the 6th International Symposium on Quality of Electronic Design (ISQED 2005), 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
A 1 V, 26 μW extended temperature range band-gap reference in 130-nm CMOS technology.
Proceedings of the 31st European Solid-State Circuits Conference, 2005
2004
Piecewise-exponential approximation for fast time-domain simulation of 2-D cellular neural networks.
IEEE Trans. Circuits Syst. II Express Briefs, 2004
2003
A reconfigurable signal processing IC with embedded FPGA and multi-port flash memory.
Proceedings of the 40th Design Automation Conference, 2003