Maria Antonia Iachino

According to our database1, Maria Antonia Iachino authored at least 6 papers between 2002 and 2007.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
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Links

On csauthors.net:

Bibliography

2007
High Speed, Programmable Implementation of a Tanh-like Activation Function and Its Derivative for Digital Neural Networks.
Proceedings of the International Joint Conference on Neural Networks, 2007

2006
Simd Multipliers for Accelerating Embedded Processors in FPGAS.
J. Circuits Syst. Comput., 2006

2004
Arithmetic circuits for multimedia extension of FPGA-based processors.
PhD thesis, 2004

Variable precision arithmetic circuits for FPGA-based multimedia processors.
IEEE Trans. Very Large Scale Integr. Syst., 2004

2003
Variable Precision Multipliers for FPGA-Based Reconfigurable Computing Systems.
Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003

2002
Speed-efficient wide adders for VIRTEX FPGAs.
Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002


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