Pasquale Corsonello
Orcid: 0000-0002-9528-1110Affiliations:
- University of Calabria, Cosenza, Italy
According to our database1,
Pasquale Corsonello
authored at least 112 papers
between 1998 and 2023.
Collaborative distances:
Collaborative distances:
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Bibliography
2023
A High-Speed FPGA-Based True Random Number Generator Using Metastability With Clock Managers.
IEEE Trans. Circuits Syst. II Express Briefs, February, 2023
IEEE Access, 2023
Proceedings of the IEEE International Conference on Networking, Sensing and Control, 2023
Secure and Energy-Efficient ECG Signal Monitoring in the IoT Healthcare using Compressive Sensing.
Proceedings of the IEEE Intl Conf on Dependable, 2023
2022
Aggressive Approximation of the SoftMax Function for Power-Efficient Hardware Implementations.
IEEE Trans. Circuits Syst. II Express Briefs, 2022
IEEE Trans. Circuits Syst. II Express Briefs, 2022
Robust and High-Performance Machine Vision System for Automatic Quality Inspection in Assembly Processes.
Sensors, 2022
IEEE Access, 2022
Hardware-Oriented Multi-Exposure Fusion Approach for Real-Time Video Processing on FPGA.
Proceedings of the 17th Conference on Ph.D Research in Microelectronics and Electronics, 2022
Proceedings of the 17th Conference on Ph.D Research in Microelectronics and Electronics, 2022
Proceedings of the 32nd International Conference on Field-Programmable Logic and Applications, 2022
2021
IEEE Trans. Circuits Syst. II Express Briefs, 2021
2020
Approximate Multipliers With Dynamic Truncation for Energy Reduction via Graceful Quality Degradation.
IEEE Trans. Circuits Syst., 2020
J. Real Time Image Process., 2020
J. Imaging, 2020
Design of a real-time face detection architecture for heterogeneous systems-on-chips.
Integr., 2020
IET Circuits Devices Syst., 2020
Proceedings of the 9th Mediterranean Conference on Embedded Computing, 2020
Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020
Proceedings of the 31st IEEE International Conference on Application-specific Systems, 2020
2019
IEEE Trans. Very Large Scale Integr. Syst., 2019
IEEE Trans. Very Large Scale Integr. Syst., 2019
An Efficient Hardware-Oriented Single-Pass Approach for Connected Component Analysis.
Sensors, 2019
J. Real Time Image Process., 2019
Proceedings of the 15th Conference on Ph.D. Research in Microelectronics and Electronics, 2019
2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018
Connected Component Analysis for Traffic Sign Recognition Embedded Processing Systems.
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018
2017
IEEE Trans. Circuits Syst. II Express Briefs, 2017
2016
Microprocess. Microsystems, 2016
2015
IEEE Trans. Very Large Scale Integr. Syst., 2015
IEEE Trans. Very Large Scale Integr. Syst., 2015
Integr., 2015
A sub-1 V nanopower temperature-compensated sub-threshold CMOS voltage reference with 0.065%/V line sensitivity.
Int. J. Circuit Theory Appl., 2015
Novel Varactor-Loaded Phasing Line for Reflectarray Unit Cell with Large Reconfigurability Frequency Range.
Proceedings of the New Contributions in Information Systems and Technologies, 2015
Exploring well configurations for voltage level converter design in 28 nm UTBB FDSOI technology.
Proceedings of the 33rd IEEE International Conference on Computer Design, 2015
2014
IEEE Trans. Very Large Scale Integr. Syst., 2014
IEEE Trans. Circuits Syst. I Regul. Pap., 2014
Design of high-speed low-power parallel-prefix adder trees in nanometer technologies.
Int. J. Circuit Theory Appl., 2014
Analyzing noise robustness of wide fan-in dynamic logic gates under process variations.
Int. J. Circuit Theory Appl., 2014
Int. J. Circuit Theory Appl., 2014
A novel background subtraction method based on color invariants and grayscale levels.
Proceedings of the International Carnahan Conference on Security Technology, 2014
2013
Comput. Vis. Image Underst., 2013
2012
IEEE Trans. Circuits Syst. II Express Briefs, 2012
IEEE Trans. Circuits Syst. II Express Briefs, 2012
Microelectron. Reliab., 2012
Microprocess. Microsystems, 2012
Int. J. Circuit Theory Appl., 2012
2011
IEEE Trans. Circuits Syst. I Regul. Pap., 2011
IEEE J. Solid State Circuits, 2011
Int. J. Circuit Theory Appl., 2011
Int. J. Circuit Theory Appl., 2011
Tapered-VTH CMOS buffer design for improved energy efficiency in deep nanometer technology.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
Optimization and evaluation of tapered-VTH approach for energy-efficient CMOS buffers.
Proceedings of the 20th European Conference on Circuit Theory and Design, 2011
2010
Exploiting Self-Reconfiguration Capability to Improve SRAM-based FPGA Robustness in Space and Avionics Applications.
ACM Trans. Reconfigurable Technol. Syst., 2010
Impact of Process Variations on Pulsed Flip-Flops: Yield Improving Circuit-Level Techniques and Comparative Analysis.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation, 2010
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2010
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
Proceedings of the 3rd International Conference on Emerging Trends in Engineering and Technology, 2010
Proceedings of the 3rd International Conference on Emerging Trends in Engineering and Technology, 2010
2009
IEEE Trans. Circuits Syst. II Express Briefs, 2009
Design and Evaluation of an Energy-Delay-Area Efficient Datapath for Coarse-Grain Reconfigurable Computing Systems.
J. Low Power Electron., 2009
Design-Space Exploration of Energy-Delay-Area Efficient Coarse-Grain Reconfigurable Datapath.
Proceedings of the VLSI Design 2009: Improving Productivity through Higher Abstraction, 2009
Quad-Port Memory Blocks in Radiation-Tolerant FPGAs: An Application for Image Processing Systems.
Proceedings of the Second International Conference on Emerging Trends in Engineering & Technology, 2009
Proceedings of the 19th ACM Great Lakes Symposium on VLSI 2009, 2009
An Efficient and Low-Cost Design Methodology to Improve SRAM-Based FPGA Robustness in Space and Avionics Applications.
Proceedings of the Reconfigurable Computing: Architectures, 2009
2008
IEEE Trans. Circuits Syst. II Express Briefs, 2008
A programmable carrier phase independent symbol timing recovery circuit for QPSK/OQPSK signals.
Microprocess. Microsystems, 2008
Microprocess. Microsystems, 2008
IET Circuits Devices Syst., 2008
Power/throughput/area efficient PIM-based reconfigurable array for parallel processing.
Proceedings of the 21st Annual IEEE International SoC Conference, SoCC 2008, 2008
Power-Efficient High Throughput Reconfigurable Datapath Design for Portable Multimedia Devices.
Proceedings of the ReConFig'08: 2008 International Conference on Reconfigurable Computing and FPGAs, 2008
Energy Efficient Coarse-Grain Reconfigurable Array for Accelerating Digital Signal Processing.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2008
A New Dynamic Logic Circuit Design for an Effective Trade-Off between Noise-Immunity, Performance and Energy Dissipation.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2008
2007
IET Circuits Devices Syst., 2007
MORA: A New Coarse-Grain Reconfigurable Array for High Throughput Multimedia Processing.
Proceedings of the Embedded Computer Systems: Architectures, 2007
An efficient and optimized FPGA Feedback M-PSK Symbol Timing Recovery Architecture based on the Gardner Timing Error Detector.
Proceedings of the Tenth Euromicro Conference on Digital System Design: Architectures, 2007
Proceedings of the Tenth Euromicro Conference on Digital System Design: Architectures, 2007
Proceedings of the Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), 2007
2006
IEEE Trans. Very Large Scale Integr. Syst., 2006
IEEE Trans. Circuits Syst. Video Technol., 2006
J. Circuits Syst. Comput., 2006
Leakage energy reduction techniques in deep submicron cache memories: a comparative study.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
An integrated countermeasure against differential power analysis for secure smart-cards.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Proceedings of the 13th IEEE International Conference on Electronics, 2006
Proceedings of the 13th IEEE International Conference on Electronics, 2006
2005
IEEE Trans. Circuits Syst. I Regul. Pap., 2005
Microprocess. Microsystems, 2005
Microprocess. Microsystems, 2005
J. Circuits Syst. Comput., 2005
Proceedings of the Integrated Circuit and System Design, 2005
Cost-effective low-power processor-in-memory-based reconfigurable datapath for multimedia applications.
Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005
Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005
2004
IEEE Trans. Very Large Scale Integr. Syst., 2004
Area- and Power-Reduced Standard-Cell Spanning Tree Adders.
Proceedings of the International Conference on Embedded Systems and Applications, 2004
2003
IEEE Trans. Very Large Scale Integr. Syst., 2003
Proceedings of the 2003 10th IEEE International Conference on Electronics, 2003
Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003
2002
IEEE Trans. Very Large Scale Integr. Syst., 2002
Proceedings of the 10th Euromicro Workshop on Parallel, 2002
Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002
2001
VLSI implementation of a fully static CMOS 56-bit self-timed adder using overlapped execution circuits.
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001
2000
IEEE Trans. Very Large Scale Integr. Syst., 2000
Proceedings of the Integrated Circuit Design, 2000
Proceedings of the 26th EUROMICRO 2000 Conference, 2000
1999
Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999
1998
Microprocess. Microsystems, 1998