Marif Daula Siddique

Orcid: 0000-0002-0799-500X

According to our database1, Marif Daula Siddique authored at least 30 papers between 2019 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Bibliography

2023
A new family of high gain boost DC-DC converters with reduced switch voltage stress for renewable energy sources.
Int. J. Circuit Theory Appl., March, 2023

Reduced Voltage Stress and Spikes in Source Current of 7-Level Switched-Capacitor Based Multilevel Inverter.
IEEE Access, 2023

Design and Validation of 5-Level Unity Gain Inverter Topology with Open-Circuit Fault-Tolerant Capability.
Proceedings of the 49th Annual Conference of the IEEE Industrial Electronics Society, 2023

An Improved Degradation Monitoring Method for High Power IGBT Modules Based on On-State Resistance Estimation.
Proceedings of the 49th Annual Conference of the IEEE Industrial Electronics Society, 2023

2022
A triple boost 13-level switched-capacitor based multi-level inverter topology for solar PV applications.
Int. J. Circuit Theory Appl., December, 2022

Asynchronous Particle Swarm Optimization-Genetic Algorithm (APSO-GA) Based Selective Harmonic Elimination in a Cascaded H-Bridge Multilevel Inverter.
IEEE Trans. Ind. Electron., 2022

A new high-level boost inverter topology with reduced device count.
Int. J. Circuit Theory Appl., 2022

A new seven-level ANPC inverter structure with semiconductor device reduction.
Int. J. Circuit Theory Appl., 2022

A non-isolated quasi-Z-source-based high-gain DC-DC converter.
Int. J. Circuit Theory Appl., 2022

2021
Compact Seven-Level Boost Type Inverter Topology.
IEEE Trans. Circuits Syst. II Express Briefs, 2021

Analysis and implementation of a new asymmetric double H-bridge multilevel inverter.
Int. J. Circuit Theory Appl., 2021

A twice boost nine-level switched-capacitor multilevel (2B-9L-SCMLI) inverter with self-voltage balancing capability.
Int. J. Circuit Theory Appl., 2021

Asymmetrical multilevel inverter topology with low total standing voltage and reduced switches count.
Int. J. Circuit Theory Appl., 2021

Experimental validation of nine-level switched-capacitor inverter topology with high voltage gain.
Int. J. Circuit Theory Appl., 2021

A high gain noninverting DC-DC converter with low voltage stress for industrial applications.
Int. J. Circuit Theory Appl., 2021

A New Family of Step-Up Hybrid Switched-Capacitor Integrated Multilevel Inverter Topologies With Dual Input Voltage Sources.
IEEE Access, 2021

A Cross Connected Asymmetrical Switched-Capacitor Multilevel Inverter.
IEEE Access, 2021

Implementation and Analysis of a 15-Level Inverter Topology With Reduced Switch Count.
IEEE Access, 2021

2020
A New Switched Capacitor 7L Inverter With Triple Voltage Gain and Low Voltage Stress.
IEEE Trans. Circuits Syst. II Express Briefs, 2020

Reduced Switch Count Based Single Source 7L Boost Inverter Topology.
IEEE Trans. Circuits Syst., 2020

Extended Multilevel Inverter Topology With Reduced Switch Count and Voltage Stress.
IEEE Access, 2020

A New Configurable Topology for Multilevel Inverter With Reduced Switching Components.
IEEE Access, 2020

A Single DC Source Nine-Level Switched-Capacitor Boost Inverter Topology With Reduced Switch Count.
IEEE Access, 2020

A New Eight Switch Seven Level Boost Active Neutral Point Clamped (8S-7L-BANPC) Inverter.
IEEE Access, 2020

A New Seven-Level Inverter Topology with Reduced Switch Number.
Proceedings of the 46th Annual Conference of the IEEE Industrial Electronics Society, 2020

2019
Low Switching Frequency Based Asymmetrical Multilevel Inverter Topology With Reduced Switch Count.
IEEE Access, 2019

A New Multilevel Inverter Topology With Reduce Switch Count.
IEEE Access, 2019

Optimal Design of a New Cascaded Multilevel Inverter Topology With Reduced Switch Count.
IEEE Access, 2019

A New Single Phase Single Switched-Capacitor Based Nine-Level Boost Inverter Topology With Reduced Switch Count and Voltage Stress.
IEEE Access, 2019

A New Single-Phase Single Source Nine Level Boost Inverter Topology.
Proceedings of the IECON 2019, 2019


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