Mariusz Wisniewski

According to our database, Mariusz Wisniewski authored at least 10 papers between 2008 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2022

Drone Model Classification Using Convolutional Neural Network Trained on Synthetic Data.

Mariusz Wisniewski, Zeeshan A. Rana, Ivan Petrunin

J. Imaging, 2022

2021

DECOLib: A library of components for DECOmposition of discrete functions.

Stanislaw Deniziak, Mariusz Wisniewski

SoftwareX, 2021

2018

BMB synthesis of binary functions using symbolic functional decomposition for LUT-based FPGAs.

Mariusz Wisniewski, Stanislaw Deniziak

J. Parallel Distributed Comput., 2018

2016

Synthesis of Multivalued Logical Networks for FPGA Implementations.

Stanislaw Deniziak, Mariusz Wisniewski, Karol Wieczorek

Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016

2015

Symbolic Functional Decomposition of Multivalued Functions.

Stanislaw Deniziak, Mariusz Wisniewski

J. Multiple Valued Log. Soft Comput., 2015

2013

NoizCrowd: A Crowd-Based Data Gathering and Management System for Noise Level Data.

Mariusz Wisniewski, Gianluca Demartini, Apostolos Malatras, Philippe Cudré-Mauroux

Proceedings of the Mobile Web and Information Systems - 10th International Conference, 2013

2011

dipLODocus[RDF] - Short and Long-Tail RDF Analytics for Massive Webs of Data.

Marcin Wylot, Jigé Pont, Mariusz Wisniewski, Philippe Cudré-Mauroux

Proceedings of the Semantic Web - ISWC 2011, 2011

2009

A symbolic RTL synthesis for LUT-based FPGAs.

Stanislaw Deniziak, Mariusz Wisniewski

Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2009

2008

An symbolic decomposition of functions with multi-valued inputs and outputs for FPGA-based implementation.

Stanislaw Deniziak, Mariusz Wisniewski

Proceedings of the FPL 2008, 2008

An Integrated Input Encoding and Symbolic Functional Decomposition for LUT-Based FPGAs.

Stanislaw Deniziak, Mariusz Wisniewski

Proceedings of the 11th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2008), 2008