Stanislaw Deniziak

According to our database1, Stanislaw Deniziak authored at least 42 papers between 1994 and 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2019
Graph of Primitives Matching Problem in the World Wide Web CBIR Searching Using Query by Approximate Shapes.
Proceedings of the Distributed Computing and Artificial Intelligence, 2019

2018
BMB synthesis of binary functions using symbolic functional decomposition for LUT-based FPGAs.
J. Parallel Distrib. Comput., 2018

Codesign of energy and resource efficient contention-free Network-on Chip for real-time embedded systems.
Proceedings of the 11th International Workshop on Network on Chip Architectures, 2018

Query by Approximate Shapes Image Retrieval with improved object sketch extraction algorithm.
Proceedings of the 2018 Federated Conference on Computer Science and Information Systems, 2018

Hierarchical Clustering in Scalable Distributed Two-Layer Datastore for Big Data as a Service.
Proceedings of the Sixth International Conference on Enterprise Systems, 2018

World Wide Web CBIR Searching Using Query by Approximate Shapes.
Proceedings of the Distributed Computing and Artificial Intelligence, 2018

2017
Business Intelligence Platform for Big Data based on Scalable Distributed Two-Layer Data Store.
Proceedings of the Communication Papers of the 2017 Federated Conference on Computer Science and Information Systems, 2017

New Content Based Image Retrieval database structure using Query by Approximate Shapes.
Proceedings of the 2017 Federated Conference on Computer Science and Information Systems, 2017

2016
Content Based Image Retrieval Using Modified Scalable Distributed Two-Layer Data Structure.
IJCSA, 2016

Content Based Image Retrieval using Query by Approximate Shape.
Proceedings of the 2016 Federated Conference on Computer Science and Information Systems, 2016

Synthesis of Multivalued Logical Networks for FPGA Implementations.
Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016

2015
Design of Real-Time Computer-Based Systems Using Developmental Genetic Programming.
Proceedings of the Handbook of Genetic Programming Applications, 2015

Symbolic Functional Decomposition of Multivalued Functions.
Multiple-Valued Logic and Soft Computing, 2015

Scalable Distributed Two-Layer Block Based Datastore.
Proceedings of the Parallel Processing and Applied Mathematics, 2015

Query-by-Shape interface for Content Based Image Retrieval.
Proceedings of the 8th International Conference on Human System Interaction, 2015

The scalable distributed two-layer Content Based Image Retrieval data store.
Proceedings of the 2015 Federated Conference on Computer Science and Information Systems, 2015

Synthesis of power aware adaptive schedulers for embedded systems using developmental genetic programming.
Proceedings of the 2015 Federated Conference on Computer Science and Information Systems, 2015

Preserving Data Consistency in Scalable Distributed Two Layer Data Structures.
Proceedings of the Beyond Databases, Architectures and Structures, 2015

Query by Shape for Image Retrieval from Multimedia Databases.
Proceedings of the Beyond Databases, Architectures and Structures, 2015

2014
Cost Optimization of Real-Time Cloud Applications Using Developmental Genetic Programming.
Proceedings of the 7th IEEE/ACM International Conference on Utility and Cloud Computing, 2014

An Application of Developmental Genetic Programming for Automatic Creation of Supervisors of Multi-task Real-Time Object-Oriented Systems.
Proceedings of the 2014 Federated Conference on Computer Science and Information Systems, 2014

Synthesis of Real Time Distributed Applications for Cloud Computing.
Proceedings of the 2014 Federated Conference on Computer Science and Information Systems, 2014

2012
Aspect-oriented SystemC-based performance evaluation of real-time embedded software.
Proceedings of the 11th IFAC Conference on Programmable Devices and Embedded Systems, 2012

Synthesis of Real-Time Applications for Internet of Things.
Proceedings of the Pervasive Computing and the Networked World, 2012

Evolutionary Optimization of Decomposition Strategies for Logical Functions.
Proceedings of the Swarm and Evolutionary Computation, 2012

2011
Parallel Approach to the Functional Decomposition of Logical Functions Using Developmental Genetic Programming.
Proceedings of the Parallel Processing and Applied Mathematics, 2011

2010
Contention-free and application-specific network-on-chip generation for embedded systems.
Proceedings of the 10th IFAC Workshop on Programmable Devices and Embedded Systems, 2010

2009
A symbolic RTL synthesis for LUT-based FPGAs.
Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2009

Contention-avoiding custom topology generation for network-on-chip.
Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2009

2008
Hardware/Software Co-synthesis of Distributed Embedded Systems Using Genetic Programming.
Proceedings of the Evolvable Systems: From Biology to Hardware, 2008

An symbolic decomposition of functions with multi-valued inputs and outputs for FPGA-based implementation.
Proceedings of the FPL 2008, 2008

An Integrated Input Encoding and Symbolic Functional Decomposition for LUT-Based FPGAs.
Proceedings of the 11th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2008), 2008

Rapid Prototyping of NoC Architectures from a SystemC Specification.
Proceedings of the 11th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2008), 2008

2007
Resource Constrained Co-synthesis of Self-reconfigurable SOPCs.
Proceedings of the 10th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2007), 2007

2004
Validation of reactive embedded systems against specification requirements.
Annales UMCS, Informatica, 2004

RT-level fast fault simulator.
Annales UMCS, Informatica, 2004

Fast high-level fault simulator.
Proceedings of the 2004 11th IEEE International Conference on Electronics, 2004

Validation of Reactive Embedded Systems against Temporal Requirements.
Proceedings of the 11th IEEE International Conference on the Engineering of Computer-Based Systems (ECBS 2004), 2004

2003
An Iterative Improvement Co-synthesis Algorithm for Optimization of SOPC Architecture with Dynamically Reconfigurable FPGAs.
Proceedings of the 2003 Euromicro Symposium on Digital Systems Design (DSD 2003), 2003

2001
Developing a High-Level Fault Simulation Standard.
IEEE Computer, 2001

1999
High Level Testbench Generation for VHDL Models.
Proceedings of the 6th Symposium on Engineering of Computer-Based Systems (ECBS '99), 1999

1994
Cupland - A Behavioral Level Description Compiler for Designing of PLD/EPLD-Based Systems.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994


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