Marleen Adé

According to our database1, Marleen Adé authored at least 13 papers between 1994 and 2000.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2000
Transformations of a 3D Image Reconstruction Algorithm for Data Transfer and Storage Optimisation.
Des. Autom. Embed. Syst., 2000

1999
Transformations of a 3D Image Reconstruction Algorithm for Data Transfer and Storage Optimization.
Proceedings of the Tenth IEEE International Workshop on Rapid System Prototyping (RSP 1999), 1999

1998
Code Generation of Data Dominated DSP Applications for FPGA Targets.
Proceedings of the Ninth IEEE International Workshop on Rapid System Prototyping (RSP 1998), 1998

Code Generation for Compiled Bit-True Simulation of DSP Applications.
Proceedings of the 11th International Symposium on System Synthesis, 1998

1997
Prototyping of the Receiver Unit for a Broadband Access Network.
Proceedings of the 10th International Symposium on System Synthesis, 1997

Data Memory Minimisation for Synchronous Data Flow Graphs Emulated on DSP-FPGA Targets.
Proceedings of the 34st Conference on Design Automation, 1997

1996
Implementing DSP applications on heterogeneous targets using minimal size data buffers.
Proceedings of the Seventh IEEE International Workshop on Rapid System Prototyping (RSP '96), 1996

OMI building blocks and developments for future high performance processing systems in the aerospace and automotive fields: DSP, SMCS and VIRTUOSO.
Proceedings of Third International Conference on Electronics, Circuits, and Systems, 1996

Real-time emulation of DSP applications on programmable DSPs and FPGAs.
Proceedings of Third International Conference on Electronics, Circuits, and Systems, 1996

1995
Grape-II: A System-Level Prototyping Environment for DSP Applications.
Computer, 1995

Hardware-software codesign with GRAPE.
Proceedings of the Sixth IEEE International Workshop on Rapid System Prototyping (RSP '95), 1995

1994
Geometric parallelism and cyclo-static data flow in GRAPE-II.
Proceedings of IEEE 5th International Workshop on Rapid System Prototyping, 1994

Buffer memory requirements in DSP applications.
Proceedings of IEEE 5th International Workshop on Rapid System Prototyping, 1994


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