Masatoshi Arai

According to our database1, Masatoshi Arai authored at least 11 papers between 1993 and 2023.

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Bibliography

2023
RT-libSGM: FPGA-Oriented Real-Time Stereo Matching System with High Scalability.
IEICE Trans. Inf. Syst., March, 2023

2022
Weighted Least Square Filter for Improving the Quality of Depth Map on FPGA.
Int. J. Netw. Comput., 2022

RT-libSGM: An Implementation of a Real-time Stereo Matching System on FPGA.
Proceedings of the HEART 2022: International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies, Tsukuba, Japan, June 9, 2022

2021
CLAHE Implementation and Evaluation on a Low-End FPGA Board by High-Level Synthesis.
IEICE Trans. Inf. Syst., 2021

Weight Least Square Filter for Improving the Quality of Depth Map on FPGA.
Proceedings of the Ninth International Symposium on Computing and Networking, 2021

2020
CLAHE implementation on a low-end FPGA board by high-level synthesis.
Proceedings of the Eighth International Symposium on Computing and Networking Workshops, 2020

2011
Face Image Enhancement Taking into Account Lighting Behavior on a Face.
Proceedings of the Computer Analysis of Images and Patterns, 2011

2010
Ultra-High-Speed Image Signal Accumulation Sensor.
Sensors, 2010

2007
A High Speed License Plate Recognition System on an FPGA.
Proceedings of the FPL 2007, 2007

Implementation and Evaluation of a High Speed License Plate Recognition System on an FPGA.
Proceedings of the Seventh International Conference on Computer and Information Technology (CIT 2007), 2007

1993
A neural inverse function for automatic test pattern generation using strictly digital neural networks.
Proceedings of the 11th IEEE VLSI Test Symposium (VTS'93), 1993


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