Matías J. Garrido

Orcid: 0000-0003-1466-6041

According to our database1, Matías J. Garrido authored at least 30 papers between 1996 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2023
Implementation of a Real-Time Versatile Video Coding Decoder Based on VVdeC Over an Embedded Multicore Platform.
IEEE Trans. Consumer Electron., February, 2023

2020
An FPGA-Based Architecture for the Versatile Video Coding Multiple Transform Selection Core.
IEEE Access, 2020

2019
A 2-D Multiple Transform Processor for the Versatile Video Coding Standard.
IEEE Trans. Consumer Electron., 2019

2018
A High Performance FPGA-Based Architecture for the Future Video Coding Adaptive Multiple Core Transform.
IEEE Trans. Consumer Electron., 2018

2017
Real-time HEVC decoding with OpenHEVC and OpenMP.
Proceedings of the IEEE International Conference on Consumer Electronics, 2017

2016
Design of multicore HEVC decoders using actor-based dataflow models and OpenMP.
IEEE Trans. Consumer Electron., 2016

Design of multicore HEVC decoders using actor-based dataflow models and OpenMP.
Proceedings of the IEEE International Conference on Consumer Electronics, 2016

2015
A multicore DSP HEVC decoder using an actorbased dataflow model and OpenMP.
IEEE Trans. Consumer Electron., 2015

A DSP-based HEVC decoder implementation using RVC-CAL and native OpenHEVC code.
Proceedings of the International Symposium on Consumer Electronics, 2015

A multicore DSP HEVC decoder using an actor-based dataflow model.
Proceedings of the IEEE International Conference on Consumer Electronics, 2015

2014
A Linux implementation of the energy-based fair queuing algorithm on an ARM-based embedded system.
Proceedings of the IEEE International Conference on Consumer Electronics, 2014

A DSP HEVC decoder implementation based on OpenHEVC.
Proceedings of the IEEE International Conference on Consumer Electronics, 2014

2013
Maximizing the user experience with energy-based fair sharing in battery limited mobile systems.
IEEE Trans. Consumer Electron., 2013

Complexity analysis of an HEVC decoder based on a digital signal processor.
IEEE Trans. Consumer Electron., 2013

A DSP-Based HEVC decoder implementation using an actor language dataflow model.
IEEE Trans. Consumer Electron., 2013

A PMC-driven methodology for energy estimation in RVC-CAL video codec specifications.
Signal Process. Image Commun., 2013

Multi-DSP implementation of a H.264/SVC decoder.
Proceedings of the IEEE International Symposium on Consumer Electronics, 2013

Energy-based fair queuing: Trading off energy management and time-constraint meeting in mobile systems.
Proceedings of the IEEE International Conference on Consumer Electronics, 2013

On an implementation of HEVC video decoders with DSP technology.
Proceedings of the IEEE International Conference on Consumer Electronics, 2013

2012
3D videoconferencing system using spatial scalability.
Proceedings of the IEEE International Conference on Consumer Electronics, 2012

2009
An H.264 video decoder based on a latest generation DSP.
IEEE Trans. Consumer Electron., 2009

2008
A DSP Based H.264 Decoder for a Multi-Format IP Set-Top Box.
IEEE Trans. Consumer Electron., 2008

2007
A real-time H.264 MP decoder based on a DM642 DSP.
Proceedings of the 14th IEEE International Conference on Electronics, 2007

2006
A DSP based IP set-top box for home entertainment.
IEEE Trans. Consumer Electron., 2006

The Prototyping Methodology of a Data Receiver for Digital Audio Broadcasting (DAB) Networks.
Proceedings of the 17th IEEE International Workshop on Rapid System Prototyping (RSP 2006), 2006

2005
The rapid prototyping experience of an H.263 video coder onto FPGA.
Microprocess. Microsystems, 2005

2003
A flexible architecture for H.263 video coding.
J. Syst. Archit., 2003

2002
An FPGA implementation of a flexible architecture for H.263 video coding.
IEEE Trans. Consumer Electron., 2002

A Flexible H.263 Video Coder Prototype Based on FPGA.
Proceedings of the 13th IEEE International Workshop on Rapid System Prototyping (RSP 2002), 2002

1996
VLSI Architecture for Motion Estimation using the Block-Matching Algorithm.
Proceedings of the 1996 European Design and Test Conference, 1996


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