Mauricio Vanegas

According to our database, Mauricio Vanegas authored at least 15 papers between 2005 and 2017.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2017

A Portable Bio-Inspired Architecture for Efficient Robotic Vergence Control.

Agostino Gibaldi, Mauricio Vanegas, Andrea Canessa, Silvio P. Sabatini

Int. J. Comput. Vis., 2017

2015

Hierarchical architecture for motion and depth estimations based on color cues.

Francisco Barranco, Matteo Tomasi, Mauricio Vanegas, Javier Díaz, Sara Granados, Eduardo Ros Vidal

J. Real Time Image Process., 2015

2013

Adaptive and Predictive Control of a Simulated Robot arm.

Silvia Tolu, Mauricio Vanegas, Jesús Alberto Garrido, Niceto R. Luque, Eduardo Ros

Int. J. Neural Syst., 2013

Pipelined architecture for real-time cost-optimized extraction of visual primitives based on FPGAs.

Francisco Barranco, Matteo Tomasi, Javier Díaz, Mauricio Vanegas, Eduardo Ros

Digit. Signal Process., 2013

2012

Real-Time Architecture for a Robust Multi-Scale Stereo Engine on FPGA.

Matteo Tomasi, Mauricio Vanegas, Francisco Barranco, Javier Díaz, Eduardo Ros

IEEE Trans. Very Large Scale Integr. Syst., 2012

Parallel Architecture for Hierarchical Optical Flow Estimation Based on FPGA.

Francisco Barranco, Matteo Tomasi, Javier Díaz, Mauricio Vanegas, Eduardo Ros

IEEE Trans. Very Large Scale Integr. Syst., 2012

Massive Parallel-Hardware Architecture for Multiscale Stereo, Optical Flow and Image-Structure Computation.

Matteo Tomasi, Mauricio Vanegas, Francisco Barranco, Javier Díaz, Eduardo Ros

IEEE Trans. Circuits Syst. Video Technol., 2012

Bio-inspired adaptive feedback error learning architecture for motor control.

Silvia Tolu, Mauricio Vanegas, Niceto R. Luque, Jesús Alberto Garrido, Eduardo Ros

Biol. Cybern., 2012

2011

On-Chip Ego-Motion Estimation Based on Optical Flow.

Mauricio Vanegas, Leonardo Rubio, Matteo Tomasi, Javier Díaz, Eduardo Ros

Proceedings of the Reconfigurable Computing: Architectures, Tools and Applications, 2011

2010

High-Performance Optical-Flow Architecture Based on a Multi-Scale, Multi-Orientation Phase-Based Model.

Matteo Tomasi, Mauricio Vanegas, Francisco Barranco, Javier Díaz, Eduardo Ros

IEEE Trans. Circuits Syst. Video Technol., 2010

Multi-port abstraction layer for FPGA intensive memory exploitation applications.

Mauricio Vanegas, Matteo Tomasi, Javier Díaz, Eduardo Ros Vidal

J. Syst. Archit., 2010

Fine grain pipeline architecture for high performance phase-based optical flow computation.

Matteo Tomasi, Francisco Barranco, Mauricio Vanegas, Javier Díaz, Eduardo Ros Vidal

J. Syst. Archit., 2010

2006

Digital Hardware Architectures of Kohonen's Self Organizing Feature Maps with Exponential Neighboring Function.

Jorge Peña, Mauricio Vanegas, Andrés Valencia

Proceedings of the 2006 IEEE International Conference on Reconfigurable Computing and FPGA's, 2006

2005

Digital Hardware Design of a One-Dimensional Kohonen's SOFM with Chessboard Norm and Exponential Neighboring Function.

Jorge A. Peña, Andrés Valencia, Mauricio Vanegas

Proceedings of the Memorias del Congreso Internacional de Inteligencia Computacional, 2005

Desarrollo de un Control Difuso de Temperatura para una Lámpara de Calor Radiante para Neonatos.

Jair Montoya, Juan Osorio, Mauricio Vanegas

Proceedings of the Memorias del Congreso Internacional de Inteligencia Computacional, 2005