Meenatchi Jagasivamani

According to our database, Meenatchi Jagasivamani authored at least 10 papers between 2001 and 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2022

Model And Evaluation Of A Superconducting-Logic Based Hybrid CPU-Accelerator System.

Meenatchi Jagasivamani, Christine Fong, Kenneth Goodnow, Robert Voigt

Proceedings of the Annual Modeling and Simulation Conference, 2022

2021

Monolithically Integrating Non-Volatile Main Memory over the Last-Level Cache.

Candace Walden, Devesh Singh, Meenatchi Jagasivamani, Shang Li, Luyi Kang, Mehdi Asnaashari, Sylvain Dubois, Bruce L. Jacob, Donald Yeung

ACM Trans. Archit. Code Optim., 2021

2020

Tileable Monolithic ReRAM Memory Design.

Meenatchi Jagasivamani, Candace Walden, Devesh Singh, Luyi Kang, Mehdi Asnaashari, Sylvain Dubois, Bruce L. Jacob, Donald Yeung

Proceedings of the 2020 IEEE Symposium in Low-Power and High-Speed Chips, 2020

2019

Analyzing the Monolithic Integration of a ReRAM-Based Main Memory Into a CPU's Die.

Meenatchi Jagasivamani, Candace Walden, Devesh Singh, Luyi Kang, Shang Li, Mehdi Asnaashari, Sylvain Dubois, Bruce L. Jacob, Donald Yeung

IEEE Micro, 2019

Design for ReRAM-based main-memory architectures.

Meenatchi Jagasivamani, Candace Walden, Devesh Singh, Luyi Kang, Shang Li, Mehdi Asnaashari, Sylvain Dubois, Donald Yeung, Bruce L. Jacob

Proceedings of the International Symposium on Memory Systems, 2019

2018

Memory-systems challenges in realizing monolithic computers.

Meenatchi Jagasivamani, Candace Walden, Devesh Singh, Luyi Kang, Shang Li, Mehdi Asnaashari, Sylvain Dubois, Bruce L. Jacob, Donald Yeung

Proceedings of the International Symposium on Memory Systems, 2018

2014

Split-fabrication obfuscation: Metrics and techniques.

Meenatchi Jagasivamani, Peter Gadfort, Michel Sika, Michael Bajura, Michael Fritze

Proceedings of the 2014 IEEE International Symposium on Hardware-Oriented Security and Trust, 2014

2009

A Bipolar-Selected Phase Change Memory Featuring Multi-Level Cell Storage.

Ferdinando Bedeschi, Rich Fackenthal, Claudio Resta, Enzo Michele Donzè, Meenatchi Jagasivamani, Egidio Cassiodoro Buda, Fabio Pellizzer, David W. Chow, Alessandro Cabrini, Giacomo Matteo Angelo Calvi, Roberto Faravelli, Andrea Fantini, Guido Torelli, Duane Mills, Roberto Gastaldi, Giulio Casagrande

IEEE J. Solid State Circuits, 2009

2008

A Multi-Level-Cell Bipolar-Selected Phase-Change Memory.

Ferdinando Bedeschi, Rich Fackenthal, Claudio Resta, Enzo Michele Donzè, Meenatchi Jagasivamani, Egidio Cassiodoro Buda, Fabio Pellizzer, David W. Chow, Alessandro Cabrini, Giacomo Matteo Angelo Calvi, Roberto Faravelli, Andrea Fantini, Guido Torelli, Duane Mills, Roberto Gastaldi, Giulio Casagrande

Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

2001

Development of a low-power SRAM compiler.

Meenatchi Jagasivamani, Dong Sam Ha

Proceedings of the 2001 International Symposium on Circuits and Systems, 2001