Michael Bolotski

According to our database, Michael Bolotski authored at least 7 papers between 1989 and 2000.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of four.

2000

The design and implementation of a low-power clock-powered microprocessor.

William C. Athas, Nestoras Tzartzanis, Weihua Mao, Lena Peterson, Rajat Lal, Kisup Chong, Joong-Seok Moon, Lars J. Svensson, Michael Bolotski

IEEE J. Solid State Circuits, 2000

1998

Low-power miniaturized information display systems.

Michael Bolotski, Phillip Alvelda

Proceedings of the 1998 International Symposium on Low Power Electronics and Design, 1998

1996

Abacus - a reconfigurable bit-parallel architecture for early vision.

Michael Bolotski

PhD thesis, 1996

1995

Abacus: a 1024 processor 8 ns SIMD array.

Michael Bolotski, Thomas Simon, Carlin Vieri, Rajeevan Amirtharajah, Thomas F. Knight Jr.

Proceedings of the 16th Conference on Advanced Research in VLSI (ARVLSI '95), 1995

1993

Silt: A distributed bit-parallel architecture for early vision.

Michael Bolotski, Rod Barman, James J. Little, Daniel Camporese

Int. J. Comput. Vis., 1993

1990

Silt: the bit-parallel approach.

Rod Barman, Michael Bolotski, Daniel Camporese, James J. Little

Proceedings of the 10th IAPR International Conference on Pattern Recognition, 1990

1989

State assignment for multilevel logic using dynamic literal estimation.

Michael Bolotski, Daniel Camporese, Rod Barman

Proceedings of the 1989 IEEE International Conference on Computer-Aided Design, 1989