Thomas F. Knight Jr.

According to our database1, Thomas F. Knight Jr. authored at least 23 papers between 1991 and 2015.

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Bibliography

2015
Architectural Support for Software-Defined Metadata Processing.
Proceedings of the Twentieth International Conference on Architectural Support for Programming Languages and Operating Systems, 2015

2014
PUMP: a programmable unit for metadata processing.
Proceedings of the HASP 2014, 2014

2013
Low-fat pointers: compact encoding and efficient gate-level implementation of fat pointers for spatial safety and capability-based security.
Proceedings of the 2013 ACM SIGSAC Conference on Computer and Communications Security, 2013

2012
Hardware Support for Safety Interlocks and Introspection.
Proceedings of the Sixth IEEE International Conference on Self-Adaptive and Self-Organizing Systems Workshops, 2012

2011
Preliminary design of the SAFE platform.
Proceedings of the 6th Workshop on Programming Languages and Operating Systems, 2011

2006
GraphStep: A System Architecture for Sparse-Graph Algorithms.
Proceedings of the 14th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2006), 2006

2004
Cellular Computation and Communication Using Engineered Genetic Regulatory Networks.
Proceedings of the Cellular Computing., 2004

Genetic Process Engineering.
Proceedings of the Cellular Computing., 2004

2001
Experimental Conformation of the Basic Principles of Length-only Discrimination.
Proceedings of the DNA Computing, 7th International Workshop on DNA-Based Computers, 2001

2000
Amorphous Computing.
Commun. ACM, 2000

Engineered Communications for Microbial Robotics.
Proceedings of the DNA Computing, 6th International Workshop on DNA-Based Computers, 2000

1999
Transmission Line Clock Driver.
Proceedings of the IEEE International Conference On Computer Design, 1999

1998
High Performance, Point-to-Point, Transmission Line Signaling.
VLSI Design, 1998

1995
Non-dissipative rail drivers for adiabatic circuits.
Proceedings of the 16th Conference on Advanced Research in VLSI (ARVLSI '95), 1995

Abacus: a 1024 processor 8 ns SIMD array.
Proceedings of the 16th Conference on Advanced Research in VLSI (ARVLSI '95), 1995

1994
Guaranteeing Idempotence for Tightly-Coupled, Fault-Tolerant Networks.
Proceedings of the Parallel Computer Routing and Communication, 1994

Packaging and Multiplexing of Hierarchical Scalable Expanders.
Proceedings of the Parallel Computer Routing and Communication, 1994

Fast Arbitration in Dilated Routers.
Proceedings of the Parallel Computer Routing and Communication, 1994

Transit: reliable high speed interconnection technology.
Proceedings of the International Symposium on Parallel Architectures, 1994

Building a better butterfly: the multiplexed metabutterfly.
Proceedings of the International Symposium on Parallel Architectures, 1994

METRO: A Router Architecture for High-Performance, Short-Haul Routing Networks.
Proceedings of the 21st Annual International Symposium on Computer Architecture. Chicago, 1994

1992
Design and Performance of Multipath MIN Architectures.
Proceedings of the 4th Annual ACM Symposium on Parallel Algorithms and Architectures, 1992

1991
Technologies for low latency interconnection switches.
SIGARCH Comput. Archit. News, 1991


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