William C. Athas

According to our database1, William C. Athas authored at least 23 papers between 1988 and 2003.

Collaborative distances:
  • Dijkstra number2 of two.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2003
Voltage-pulse driven harmonic resonant rail drivers for low-power applications.
IEEE Trans. Very Large Scale Integr. Syst., 2003

2002
Compact models for estimating microprocessor frequency and power.
Proceedings of the 2002 International Symposium on Low Power Electronics and Design, 2002

Low-power sequential access memory design.
Proceedings of the IEEE 2002 Custom Integrated Circuits Conference, 2002

2001
Theory and practical implementation of harmonic resonant rail driver.
Proceedings of the 2001 International Symposium on Low Power Electronics and Design, 2001

2000
The design and implementation of a low-power clock-powered microprocessor.
IEEE J. Solid State Circuits, 2000

Practical considerations of clock-powered logic.
Proceedings of the 2000 International Symposium on Low Power Electronics and Design, 2000

1999
Mapping Irregular Applications to DIVA, a PIM-based Data-Intensive Architecture.
Proceedings of the ACM/IEEE Conference on Supercomputing, 1999

Retractile clock-powered logic.
Proceedings of the 1999 International Symposium on Low Power Electronics and Design, 1999

Clock-Powered CMOS: A Hybrid Adiabatic Logic Style for Energy-Efficient Computing.
Proceedings of the 18th Conference on Advanced Research in VLSI (ARVLSI '99), 1999

1997
A low-power microprocessor based on resonant energy.
IEEE J. Solid State Circuits, 1997

AC-1: a clock-powered microprocessor.
Proceedings of the 1997 International Symposium on Low Power Electronics and Design, 1997

1996
Energy recovery for the design of high-speed, low-power static RAMs.
Proceedings of the 1996 International Symposium on Low Power Electronics and Design, 1996

Energy-recovery CMOS for highly pipelined DSP designs.
Proceedings of the 1996 International Symposium on Low Power Electronics and Design, 1996

1995
Energy-efficient instruction set architecture for CMOS microprocessors.
Proceedings of the 28th Annual Hawaii International Conference on System Sciences (HICSS-28), 1995

Design and analysis of a low-power energy-recovery adder.
Proceedings of the 5th Great Lakes Symposium on VLSI (GLS-VLSI '95), 1995

Energy recovery for low-power CMOS.
Proceedings of the 16th Conference on Advanced Research in VLSI (ARVLSI '95), 1995

1994
Low-power digital systems based on adiabatic-switching principles.
IEEE Trans. Very Large Scale Integr. Syst., 1994

An energy-efficient CMOS line driver using adiabatic switching.
Proceedings of the Fourth Great Lakes Symposium on Design Automation of High Performance VLSI Systems, 1994

1993
16-Bit vs. 32-Bit Instructions for Pipelined Microprocessors.
Proceedings of the 20th Annual International Symposium on Computer Architecture, 1993

1991
The M-cache: a message-retrieving mechanism for multicomputer systems.
Proceedings of the Third IEEE Symposium on Parallel and Distributed Processing, 1991

1988
Cantor: an actor programming system for scientific computing.
Proceedings of the 1988 ACM SIGPLAN Workshop on Object-based Concurrent Programming, 1988

Multicomputers: Message-Passing Concurrent Computers.
Computer, 1988

The architecture and programming of the Ametek series 2010 multicomputer.
Proceedings of the Third Conference on Hypercube Concurrent Computers and Applications, 1988


  Loading...