Michael Katelman

According to our database1, Michael Katelman authored at least 12 papers between 2006 and 2012.

Collaborative distances:
  • Dijkstra number2 of two.
  • Erdős number3 of four.



In proceedings 
PhD thesis 


On csauthors.net:


Rewriting semantics of production rule sets.
J. Log. Algebraic Methods Program., 2012

Verification of microarchitectural refinements in rule-based systems.
Proceedings of the 9th IEEE/ACM International Conference on Formal Methods and Models for Codesign, 2011

Using the PALS Architecture to Verify a Distributed Topology Control Protocol for Wireless Multi-Hop Networks in the Presence of Node Failures
Proceedings of the Proceedings First International Workshop on Rewriting Techniques for Real-Time Systems, 2010

Concurrent Rewriting Semantics and Analysis of Asynchronous Digital Circuits.
Proceedings of the Rewriting Logic and Its Applications - 8th International Workshop, 2010

A formal executable semantics of Verilog.
Proceedings of the 8th ACM/IEEE International Conference on Formal Methods and Models for Codesign (MEMOCODE 2010), 2010

vlogsl: A Strategy Language for Simulation-Based Verification of Hardware.
Proceedings of the Hardware and Software: Verification and Testing, 2010

A Necessary and Sufficient Timing Assumption for Speed-Independent Circuits.
Proceedings of the 15th IEEE Symposium on Asynchronous Circuits and Systems, 2009

Directed-Logical Testing for Functional Verification of Microprocessors.
Proceedings of the 6th ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2008), 2008

Redesign of the LMST Wireless Sensor Protocol through Formal Modeling and Statistical Model Checking.
Proceedings of the Formal Methods for Open Object-Based Distributed Systems, 2008

Getting Formal Verification into Design Flow.
Proceedings of the FM 2008: Formal Methods, 2008

A Rewriting Semantics for ABEL with Applications to Hardware/Software Co-Design and Analysis.
Proceedings of the 6th International Workshop on Rewriting Logic and its Applications, 2006

Staging static analyses for program generation.
Proceedings of the Generative Programming and Component Engineering, 2006